Anup Patel 2b3f786408 RISC-V: defconfig: Enable RISC-V SBI earlycon support ... This patch enables RISC-V SBI earlycon support in default defconfig so that we can use "earlycon=sbi" in kernel parameters for early debug prints. Signed-off-by: Anup Patel <anup@brainfault.org> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>		2018-12-17 10:23:46 -08:00
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defconfig	RISC-V: defconfig: Enable RISC-V SBI earlycon support	2018-12-17 10:23:46 -08:00