linux/drivers/vme/bridges
Martyn Welch f0342e66b3 VME: Correct read/write alignment algorithm
In order to ensure the correct width cycles on the VME bus, the VME bridge
drivers implement an algorithm to utilise the largest possible width reads and
writes whilst maintaining natural alignment constraints. The algorithm
currently looks at the start address rather than the current read/write address
when determining whether a 16-bit width cycle is required to get to 32-bit
alignment.  This results in incorrect alignment,

Reported-by: Jim Strouth <james.strouth@ge.com>
Tested-by: Jim Strouth <james.strouth@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@ge.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-02-07 08:16:14 -08:00
..
Kconfig
Makefile
vme_ca91cx42.c VME: Correct read/write alignment algorithm 2014-02-07 08:16:14 -08:00
vme_ca91cx42.h
vme_tsi148.c VME: Correct read/write alignment algorithm 2014-02-07 08:16:14 -08:00
vme_tsi148.h