linux/arch/mips/sibyte/sb1250
Ralf Baechle 8d9df29db2 MIPS: Sibyte: Apply M3 workaround only on affected chip types and versions.
Previously it was unconditionally used on all Sibyte family SOCs.  The
M3 bug has to be handled in the TLB exception handler which is extremly
performance sensitive, so this modification is expected to deliver around
2-3% performance improvment.  This is important as required changes to the
M3 workaround will make it more costly.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12 17:26:19 +01:00
..
Makefile MIPS: Sibyte: Remove standalone kernel support 2009-06-17 11:06:27 +01:00
bus_watcher.c [MIPS] A few more pt_regs fixups. 2006-10-19 17:55:13 +01:00
irq.c include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h 2010-03-30 22:02:32 +09:00
setup.c MIPS: Sibyte: Apply M3 workaround only on affected chip types and versions. 2010-04-12 17:26:19 +01:00
smp.c cpumask: arch_send_call_function_ipi_mask: mips 2009-09-24 09:34:45 +09:30
time.c [MIPS] Sibyte: Split and move clock code. 2007-11-02 16:13:47 +00:00