103 lines
2.0 KiB
C
103 lines
2.0 KiB
C
/*
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* Corenet based SoC DS Setup
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*
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* Maintained by Kumar Gala (see MAINTAINERS for contact information)
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*
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* Copyright 2009-2011 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <asm/time.h>
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#include <asm/machdep.h>
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#include <asm/pci-bridge.h>
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#include <asm/ppc-pci.h>
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#include <mm/mmu_decl.h>
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#include <asm/prom.h>
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#include <asm/udbg.h>
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#include <asm/mpic.h>
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#include <linux/of_platform.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#include "smp.h"
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void __init corenet_ds_pic_init(void)
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{
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struct mpic *mpic;
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unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU |
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MPIC_NO_RESET;
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if (ppc_md.get_irq == mpic_get_coreint_irq)
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flags |= MPIC_ENABLE_COREINT;
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mpic = mpic_alloc(NULL, 0, flags, 0, 512, " OpenPIC ");
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BUG_ON(mpic == NULL);
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mpic_init(mpic);
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}
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/*
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* Setup the architecture
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*/
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void __init corenet_ds_setup_arch(void)
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{
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mpc85xx_smp_init();
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#if defined(CONFIG_PCI) && defined(CONFIG_PPC64)
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pci_devs_phb_init();
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#endif
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fsl_pci_assign_primary();
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swiotlb_detect_4g();
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pr_info("%s board from Freescale Semiconductor\n", ppc_md.name);
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}
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static const struct of_device_id of_device_ids[] = {
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{
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.compatible = "simple-bus"
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},
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{
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.compatible = "fsl,srio",
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},
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{
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.compatible = "fsl,p4080-pcie",
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},
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{
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.compatible = "fsl,qoriq-pcie-v2.2",
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},
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{
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.compatible = "fsl,qoriq-pcie-v2.3",
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},
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{
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.compatible = "fsl,qoriq-pcie-v2.4",
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},
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{
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.compatible = "fsl,qoriq-pcie-v3.0",
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},
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/* The following two are for the Freescale hypervisor */
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{
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.name = "hypervisor",
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},
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{
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.name = "handles",
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},
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{}
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};
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int __init corenet_ds_publish_devices(void)
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{
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return of_platform_bus_probe(NULL, of_device_ids, NULL);
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}
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