9cd11c0c47
This is a pretty significant branch. It's the introduction of the first multiplatform support on ARM, and with this (and the later branch) merged, it is now possible to build one kernel that contains support for highbank, vexpress, mvebu, socfpga, and picoxcell. More platforms will be convered over in the next few releases. Two critical last things had to be done for this to be practical and possible: * Today each platform has its own include directory under mach-<mach>/include/mach/*, and traditionally that is where a lot of driver/platform shared definitions have gone, such as platform data structures. They now need to move out to a common location instead, and this branch moves a large number of those out to include/linux/platform_data. * Each platform used to list the device trees to compile for its boards in mach-<mach>/Makefile.boot. Both of the above changes will mean that there are some merge conflicts to come (and some to resolve here). It's a one-time move and once it settles in, we should be good for quite a while. Sorry for the overhead. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJQaO7aAAoJEIwa5zzehBx3bUIP/02U8PhkHJJrrowyIsWRBOql 7LPJ53PRRgrpBdmEGzFD3TO3zaNyrjQRbYgNDvzHMO6NAMNvdRFouuWYjO11/tuB i32zssXCC+eUOEgbAo/U/lYq+UOvqw9gv6mU+3+i3OcGEhdKOaoT/DSLPQC4hoDm 222TeLfFB3HJXu5n720dEQ9V3fO6TS1+bbh8TU3cjHqzceXsOrffZqOA5CQxUcRr KWwOjA0nALDwWcqgv45GJNwY3GTyAQ/hPMQavnuWK0voJ+qUYk5HftKocAK7C+py 0T0OFOAHTwtyhvzJBxLC84M6Ox465BYXyeNjIB+2nG/Um9+mDoP0dnWpGy4c7DMU P5hyqbeLGeqjUXQuYtRmgMMc3UeHKoUGAfXW9eMsjLa6/M4NLGv//7E7LbZPpgMZ obkjwuesmcaYn/FRyj/yFmC35YlF4oCLziVzEtURZw3eKHHSUlhkTDSMNnkcZ0kZ Vv7kFxnD2Y46ixiwSJv30ErQnVkgI3MdqDlDxkE8r5+phYuK4gCrNaJtiwRh/oNw cFhpPxKuA0sJ9b6YRTzjC45eT/XZomEEr/uifCFeRNaCquyjYP00Mm8F0flSqwx9 zi+emzPAwNmk1bvxMUM/idGnaj0V4p+BAYUAvkbSoqU1p1flzyhU88fGTSIyKOt6 K5TCDS2v5hrVykK9TDwl =Tc6y -----END PGP SIGNATURE----- Merge tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM soc multiplatform enablement from Olof Johansson: "This is a pretty significant branch. It's the introduction of the first multiplatform support on ARM, and with this (and the later branch) merged, it is now possible to build one kernel that contains support for highbank, vexpress, mvebu, socfpga, and picoxcell. More platforms will be convered over in the next few releases. Two critical last things had to be done for this to be practical and possible: * Today each platform has its own include directory under mach-<mach>/include/mach/*, and traditionally that is where a lot of driver/platform shared definitions have gone, such as platform data structures. They now need to move out to a common location instead, and this branch moves a large number of those out to include/linux/platform_data. * Each platform used to list the device trees to compile for its boards in mach-<mach>/Makefile.boot. Both of the above changes will mean that there are some merge conflicts to come (and some to resolve here). It's a one-time move and once it settles in, we should be good for quite a while. Sorry for the overhead." Fix conflicts as per Olof. * tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (51 commits) ARM: add v7 multi-platform defconfig ARM: msm: Move core.h contents into common.h ARM: highbank: call highbank_pm_init from .init_machine ARM: dtb: move all dtb targets to common Makefile ARM: spear: move platform_data definitions ARM: samsung: move platform_data definitions ARM: orion: move platform_data definitions ARM: vexpress: convert to multi-platform ARM: initial multiplatform support ARM: mvebu: move armada-370-xp.h in mach dir ARM: vexpress: remove dependency on mach/* headers ARM: picoxcell: remove dependency on mach/* headers ARM: move all dtb targets out of Makefile.boot ARM: picoxcell: move debug macros to include/debug ARM: socfpga: move debug macros to include/debug ARM: mvebu: move debug macros to include/debug ARM: vexpress: move debug macros to include/debug ARM: highbank: move debug macros to include/debug ARM: move debug macros to common location ARM: make mach/gpio.h headers optional ...
632 lines
15 KiB
C
632 lines
15 KiB
C
/*
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* linux/arch/arm/mach-sa1100/assabet.c
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*
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* Author: Nicolas Pitre
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*
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* This file contains all Assabet-specific tweaks.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/errno.h>
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#include <linux/ioport.h>
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#include <linux/serial_core.h>
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#include <linux/mfd/ucb1x00.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/delay.h>
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#include <linux/mm.h>
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#include <linux/leds.h>
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#include <linux/slab.h>
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#include <video/sa1100fb.h>
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/setup.h>
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#include <asm/page.h>
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#include <asm/pgtable-hwdef.h>
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#include <asm/pgtable.h>
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#include <asm/tlbflush.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/flash.h>
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#include <asm/mach/irda.h>
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#include <asm/mach/map.h>
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#include <asm/mach/serial_sa1100.h>
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#include <mach/assabet.h>
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#include <linux/platform_data/mfd-mcp-sa11x0.h>
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#include <mach/irqs.h>
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#include "generic.h"
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#define ASSABET_BCR_DB1110 \
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(ASSABET_BCR_SPK_OFF | \
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ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
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ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
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ASSABET_BCR_IRDA_MD0)
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#define ASSABET_BCR_DB1111 \
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(ASSABET_BCR_SPK_OFF | \
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ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
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ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
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ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
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ASSABET_BCR_IRDA_MD0 | ASSABET_BCR_CF_RST)
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unsigned long SCR_value = ASSABET_SCR_INIT;
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EXPORT_SYMBOL(SCR_value);
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static unsigned long BCR_value = ASSABET_BCR_DB1110;
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void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
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{
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unsigned long flags;
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local_irq_save(flags);
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BCR_value = (BCR_value & ~mask) | val;
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ASSABET_BCR = BCR_value;
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local_irq_restore(flags);
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}
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EXPORT_SYMBOL(ASSABET_BCR_frob);
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static void assabet_ucb1x00_reset(enum ucb1x00_reset state)
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{
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if (state == UCB_RST_PROBE)
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ASSABET_BCR_set(ASSABET_BCR_CODEC_RST);
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}
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/*
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* Assabet flash support code.
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*/
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#ifdef ASSABET_REV_4
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/*
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* Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
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*/
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static struct mtd_partition assabet_partitions[] = {
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{
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.name = "bootloader",
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.size = 0x00020000,
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.offset = 0,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "bootloader params",
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.size = 0x00020000,
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.offset = MTDPART_OFS_APPEND,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "jffs",
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.size = MTDPART_SIZ_FULL,
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.offset = MTDPART_OFS_APPEND,
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}
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};
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#else
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/*
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* Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
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*/
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static struct mtd_partition assabet_partitions[] = {
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{
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.name = "bootloader",
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.size = 0x00040000,
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.offset = 0,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "bootloader params",
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.size = 0x00040000,
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.offset = MTDPART_OFS_APPEND,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "jffs",
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.size = MTDPART_SIZ_FULL,
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.offset = MTDPART_OFS_APPEND,
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}
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};
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#endif
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static struct flash_platform_data assabet_flash_data = {
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.map_name = "cfi_probe",
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.parts = assabet_partitions,
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.nr_parts = ARRAY_SIZE(assabet_partitions),
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};
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static struct resource assabet_flash_resources[] = {
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DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
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DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
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};
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/*
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* Assabet IrDA support code.
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*/
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static int assabet_irda_set_power(struct device *dev, unsigned int state)
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{
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static unsigned int bcr_state[4] = {
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ASSABET_BCR_IRDA_MD0,
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ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0,
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ASSABET_BCR_IRDA_MD1,
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0
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};
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if (state < 4) {
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state = bcr_state[state];
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ASSABET_BCR_clear(state ^ (ASSABET_BCR_IRDA_MD1|
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ASSABET_BCR_IRDA_MD0));
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ASSABET_BCR_set(state);
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}
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return 0;
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}
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static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
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{
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if (speed < 4000000)
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ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
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else
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ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
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}
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static struct irda_platform_data assabet_irda_data = {
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.set_power = assabet_irda_set_power,
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.set_speed = assabet_irda_set_speed,
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};
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static struct ucb1x00_plat_data assabet_ucb1x00_data = {
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.reset = assabet_ucb1x00_reset,
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.gpio_base = -1,
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};
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static struct mcp_plat_data assabet_mcp_data = {
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.mccr0 = MCCR0_ADM,
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.sclk_rate = 11981000,
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.codec_pdata = &assabet_ucb1x00_data,
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};
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static void assabet_lcd_set_visual(u32 visual)
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{
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u_int is_true_color = visual == FB_VISUAL_TRUECOLOR;
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if (machine_is_assabet()) {
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#if 1 // phase 4 or newer Assabet's
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if (is_true_color)
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ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
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else
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ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
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#else
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// older Assabet's
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if (is_true_color)
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ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
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else
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ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
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#endif
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}
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}
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#ifndef ASSABET_PAL_VIDEO
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static void assabet_lcd_backlight_power(int on)
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{
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if (on)
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ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
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else
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ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
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}
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/*
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* Turn on/off the backlight. When turning the backlight on, we wait
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* 500us after turning it on so we don't cause the supplies to droop
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* when we enable the LCD controller (and cause a hard reset.)
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*/
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static void assabet_lcd_power(int on)
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{
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if (on) {
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ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
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udelay(500);
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} else
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ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
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}
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/*
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* The assabet uses a sharp LQ039Q2DS54 LCD module. It is actually
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* takes an RGB666 signal, but we provide it with an RGB565 signal
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* instead (def_rgb_16).
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*/
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static struct sa1100fb_mach_info lq039q2ds54_info = {
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.pixclock = 171521, .bpp = 16,
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.xres = 320, .yres = 240,
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.hsync_len = 5, .vsync_len = 1,
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.left_margin = 61, .upper_margin = 3,
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.right_margin = 9, .lower_margin = 0,
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.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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.lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
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.lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
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.backlight_power = assabet_lcd_backlight_power,
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.lcd_power = assabet_lcd_power,
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.set_visual = assabet_lcd_set_visual,
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};
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#else
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static void assabet_pal_backlight_power(int on)
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{
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ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
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}
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static void assabet_pal_power(int on)
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{
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ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
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}
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static struct sa1100fb_mach_info pal_info = {
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.pixclock = 67797, .bpp = 16,
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.xres = 640, .yres = 512,
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.hsync_len = 64, .vsync_len = 6,
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.left_margin = 125, .upper_margin = 70,
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.right_margin = 115, .lower_margin = 36,
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.lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
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.lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
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.backlight_power = assabet_pal_backlight_power,
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.lcd_power = assabet_pal_power,
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.set_visual = assabet_lcd_set_visual,
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};
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#endif
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#ifdef CONFIG_ASSABET_NEPONSET
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static struct resource neponset_resources[] = {
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DEFINE_RES_MEM(0x10000000, 0x08000000),
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DEFINE_RES_MEM(0x18000000, 0x04000000),
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DEFINE_RES_MEM(0x40000000, SZ_8K),
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DEFINE_RES_IRQ(IRQ_GPIO25),
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};
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#endif
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static void __init assabet_init(void)
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{
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/*
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* Ensure that the power supply is in "high power" mode.
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*/
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GPSR = GPIO_GPIO16;
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GPDR |= GPIO_GPIO16;
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/*
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* Ensure that these pins are set as outputs and are driving
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* logic 0. This ensures that we won't inadvertently toggle
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* the WS latch in the CPLD, and we don't float causing
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* excessive power drain. --rmk
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*/
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GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
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GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
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/*
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* Also set GPIO27 as an output; this is used to clock UART3
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* via the FPGA and as otherwise has no pullups or pulldowns,
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* so stop it floating.
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*/
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GPCR = GPIO_GPIO27;
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GPDR |= GPIO_GPIO27;
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/*
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* Set up registers for sleep mode.
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*/
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PWER = PWER_GPIO0;
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PGSR = 0;
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PCFR = 0;
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PSDR = 0;
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PPDR |= PPC_TXD3 | PPC_TXD1;
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PPSR |= PPC_TXD3 | PPC_TXD1;
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sa11x0_ppc_configure_mcp();
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if (machine_has_neponset()) {
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/*
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* Angel sets this, but other bootloaders may not.
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*
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* This must precede any driver calls to BCR_set()
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* or BCR_clear().
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*/
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ASSABET_BCR = BCR_value = ASSABET_BCR_DB1111;
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#ifndef CONFIG_ASSABET_NEPONSET
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printk( "Warning: Neponset detected but full support "
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"hasn't been configured in the kernel\n" );
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#else
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platform_device_register_simple("neponset", 0,
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neponset_resources, ARRAY_SIZE(neponset_resources));
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#endif
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}
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#ifndef ASSABET_PAL_VIDEO
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sa11x0_register_lcd(&lq039q2ds54_info);
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#else
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sa11x0_register_lcd(&pal_video);
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#endif
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sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
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ARRAY_SIZE(assabet_flash_resources));
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sa11x0_register_irda(&assabet_irda_data);
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sa11x0_register_mcp(&assabet_mcp_data);
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}
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/*
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* On Assabet, we must probe for the Neponset board _before_
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* paging_init() has occurred to actually determine the amount
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* of RAM available. To do so, we map the appropriate IO section
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* in the page table here in order to access GPIO registers.
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*/
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static void __init map_sa1100_gpio_regs( void )
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{
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unsigned long phys = __PREG(GPLR) & PMD_MASK;
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unsigned long virt = (unsigned long)io_p2v(phys);
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int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO);
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pmd_t *pmd;
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pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt);
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*pmd = __pmd(phys | prot);
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flush_pmd_entry(pmd);
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}
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/*
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* Read System Configuration "Register"
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* (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
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* User's Guide", section 4.4.1)
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*
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* This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
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* to set up the serial port for decompression status messages. We
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* repeat it here because the kernel may not be loaded as a zImage, and
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* also because it's a hassle to communicate the SCR value to the kernel
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* from the decompressor.
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*
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* Note that IRQs are guaranteed to be disabled.
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*/
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static void __init get_assabet_scr(void)
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{
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unsigned long scr, i;
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GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */
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GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */
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GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */
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for(i = 100; i--; ) /* Read GPIO 9:2 */
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scr = GPLR;
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GPDR |= 0x3fc; /* restore correct pin direction */
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scr &= 0x3fc; /* save as system configuration byte. */
|
|
SCR_value = scr;
|
|
}
|
|
|
|
static void __init
|
|
fixup_assabet(struct tag *tags, char **cmdline, struct meminfo *mi)
|
|
{
|
|
/* This must be done before any call to machine_has_neponset() */
|
|
map_sa1100_gpio_regs();
|
|
get_assabet_scr();
|
|
|
|
if (machine_has_neponset())
|
|
printk("Neponset expansion board detected\n");
|
|
}
|
|
|
|
|
|
static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
|
|
{
|
|
if (port->mapbase == _Ser1UTCR0) {
|
|
if (state)
|
|
ASSABET_BCR_clear(ASSABET_BCR_RS232EN |
|
|
ASSABET_BCR_COM_RTS |
|
|
ASSABET_BCR_COM_DTR);
|
|
else
|
|
ASSABET_BCR_set(ASSABET_BCR_RS232EN |
|
|
ASSABET_BCR_COM_RTS |
|
|
ASSABET_BCR_COM_DTR);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
|
|
* and UART3 (radio module). We only handle them for UART1 here.
|
|
*/
|
|
static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
|
|
{
|
|
if (port->mapbase == _Ser1UTCR0) {
|
|
u_int set = 0, clear = 0;
|
|
|
|
if (mctrl & TIOCM_RTS)
|
|
clear |= ASSABET_BCR_COM_RTS;
|
|
else
|
|
set |= ASSABET_BCR_COM_RTS;
|
|
|
|
if (mctrl & TIOCM_DTR)
|
|
clear |= ASSABET_BCR_COM_DTR;
|
|
else
|
|
set |= ASSABET_BCR_COM_DTR;
|
|
|
|
ASSABET_BCR_clear(clear);
|
|
ASSABET_BCR_set(set);
|
|
}
|
|
}
|
|
|
|
static u_int assabet_get_mctrl(struct uart_port *port)
|
|
{
|
|
u_int ret = 0;
|
|
u_int bsr = ASSABET_BSR;
|
|
|
|
/* need 2 reads to read current value */
|
|
bsr = ASSABET_BSR;
|
|
|
|
if (port->mapbase == _Ser1UTCR0) {
|
|
if (bsr & ASSABET_BSR_COM_DCD)
|
|
ret |= TIOCM_CD;
|
|
if (bsr & ASSABET_BSR_COM_CTS)
|
|
ret |= TIOCM_CTS;
|
|
if (bsr & ASSABET_BSR_COM_DSR)
|
|
ret |= TIOCM_DSR;
|
|
} else if (port->mapbase == _Ser3UTCR0) {
|
|
if (bsr & ASSABET_BSR_RAD_DCD)
|
|
ret |= TIOCM_CD;
|
|
if (bsr & ASSABET_BSR_RAD_CTS)
|
|
ret |= TIOCM_CTS;
|
|
if (bsr & ASSABET_BSR_RAD_DSR)
|
|
ret |= TIOCM_DSR;
|
|
if (bsr & ASSABET_BSR_RAD_RI)
|
|
ret |= TIOCM_RI;
|
|
} else {
|
|
ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static struct sa1100_port_fns assabet_port_fns __initdata = {
|
|
.set_mctrl = assabet_set_mctrl,
|
|
.get_mctrl = assabet_get_mctrl,
|
|
.pm = assabet_uart_pm,
|
|
};
|
|
|
|
static struct map_desc assabet_io_desc[] __initdata = {
|
|
{ /* Board Control Register */
|
|
.virtual = 0xf1000000,
|
|
.pfn = __phys_to_pfn(0x12000000),
|
|
.length = 0x00100000,
|
|
.type = MT_DEVICE
|
|
}, { /* MQ200 */
|
|
.virtual = 0xf2800000,
|
|
.pfn = __phys_to_pfn(0x4b800000),
|
|
.length = 0x00800000,
|
|
.type = MT_DEVICE
|
|
}
|
|
};
|
|
|
|
static void __init assabet_map_io(void)
|
|
{
|
|
sa1100_map_io();
|
|
iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
|
|
|
|
/*
|
|
* Set SUS bit in SDCR0 so serial port 1 functions.
|
|
* Its called GPCLKR0 in my SA1110 manual.
|
|
*/
|
|
Ser1SDCR0 |= SDCR0_SUS;
|
|
|
|
if (!machine_has_neponset())
|
|
sa1100_register_uart_fns(&assabet_port_fns);
|
|
|
|
/*
|
|
* When Neponset is attached, the first UART should be
|
|
* UART3. That's what Angel is doing and many documents
|
|
* are stating this.
|
|
*
|
|
* We do the Neponset mapping even if Neponset support
|
|
* isn't compiled in so the user will still get something on
|
|
* the expected physical serial port.
|
|
*
|
|
* We no longer do this; not all boot loaders support it,
|
|
* and UART3 appears to be somewhat unreliable with blob.
|
|
*/
|
|
sa1100_register_uart(0, 1);
|
|
sa1100_register_uart(2, 3);
|
|
}
|
|
|
|
/* LEDs */
|
|
#if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
|
|
struct assabet_led {
|
|
struct led_classdev cdev;
|
|
u32 mask;
|
|
};
|
|
|
|
/*
|
|
* The triggers lines up below will only be used if the
|
|
* LED triggers are compiled in.
|
|
*/
|
|
static const struct {
|
|
const char *name;
|
|
const char *trigger;
|
|
} assabet_leds[] = {
|
|
{ "assabet:red", "cpu0",},
|
|
{ "assabet:green", "heartbeat", },
|
|
};
|
|
|
|
/*
|
|
* The LED control in Assabet is reversed:
|
|
* - setting bit means turn off LED
|
|
* - clearing bit means turn on LED
|
|
*/
|
|
static void assabet_led_set(struct led_classdev *cdev,
|
|
enum led_brightness b)
|
|
{
|
|
struct assabet_led *led = container_of(cdev,
|
|
struct assabet_led, cdev);
|
|
|
|
if (b != LED_OFF)
|
|
ASSABET_BCR_clear(led->mask);
|
|
else
|
|
ASSABET_BCR_set(led->mask);
|
|
}
|
|
|
|
static enum led_brightness assabet_led_get(struct led_classdev *cdev)
|
|
{
|
|
struct assabet_led *led = container_of(cdev,
|
|
struct assabet_led, cdev);
|
|
|
|
return (ASSABET_BCR & led->mask) ? LED_OFF : LED_FULL;
|
|
}
|
|
|
|
static int __init assabet_leds_init(void)
|
|
{
|
|
int i;
|
|
|
|
if (!machine_is_assabet())
|
|
return -ENODEV;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(assabet_leds); i++) {
|
|
struct assabet_led *led;
|
|
|
|
led = kzalloc(sizeof(*led), GFP_KERNEL);
|
|
if (!led)
|
|
break;
|
|
|
|
led->cdev.name = assabet_leds[i].name;
|
|
led->cdev.brightness_set = assabet_led_set;
|
|
led->cdev.brightness_get = assabet_led_get;
|
|
led->cdev.default_trigger = assabet_leds[i].trigger;
|
|
|
|
if (!i)
|
|
led->mask = ASSABET_BCR_LED_RED;
|
|
else
|
|
led->mask = ASSABET_BCR_LED_GREEN;
|
|
|
|
if (led_classdev_register(NULL, &led->cdev) < 0) {
|
|
kfree(led);
|
|
break;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Since we may have triggers on any subsystem, defer registration
|
|
* until after subsystem_init.
|
|
*/
|
|
fs_initcall(assabet_leds_init);
|
|
#endif
|
|
|
|
MACHINE_START(ASSABET, "Intel-Assabet")
|
|
.atag_offset = 0x100,
|
|
.fixup = fixup_assabet,
|
|
.map_io = assabet_map_io,
|
|
.nr_irqs = SA1100_NR_IRQS,
|
|
.init_irq = sa1100_init_irq,
|
|
.timer = &sa1100_timer,
|
|
.init_machine = assabet_init,
|
|
.init_late = sa11x0_init_late,
|
|
#ifdef CONFIG_SA1111
|
|
.dma_zone_size = SZ_1M,
|
|
#endif
|
|
.restart = sa11x0_restart,
|
|
MACHINE_END
|