143 lines
4.4 KiB
C
143 lines
4.4 KiB
C
/* linux/arch/arm/plat-s3c/include/plat/gpio-core.h
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*
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* Copyright 2008 Simtec Electronics
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* http://armlinux.simtec.co.uk/
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C Platform - GPIO core
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __PLAT_SAMSUNG_GPIO_CORE_H
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#define __PLAT_SAMSUNG_GPIO_CORE_H
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#define GPIOCON_OFF (0x00)
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#define GPIODAT_OFF (0x04)
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#define con_4bit_shift(__off) ((__off) * 4)
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/* Define the core gpiolib support functions that the s3c platforms may
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* need to extend or change depending on the hardware and the s3c chip
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* selected at build or found at run time.
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*
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* These definitions are not intended for driver inclusion, there is
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* nothing here that should not live outside the platform and core
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* specific code.
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*/
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struct samsung_gpio_chip;
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/**
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* struct samsung_gpio_pm - power management (suspend/resume) information
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* @save: Routine to save the state of the GPIO block
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* @resume: Routine to resume the GPIO block.
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*/
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struct samsung_gpio_pm {
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void (*save)(struct samsung_gpio_chip *chip);
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void (*resume)(struct samsung_gpio_chip *chip);
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};
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struct samsung_gpio_cfg;
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/**
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* struct samsung_gpio_chip - wrapper for specific implementation of gpio
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* @chip: The chip structure to be exported via gpiolib.
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* @base: The base pointer to the gpio configuration registers.
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* @group: The group register number for gpio interrupt support.
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* @irq_base: The base irq number.
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* @config: special function and pull-resistor control information.
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* @lock: Lock for exclusive access to this gpio bank.
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* @pm_save: Save information for suspend/resume support.
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* @bitmap_gpio_int: Bitmap for representing GPIO interrupt or not.
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*
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* This wrapper provides the necessary information for the Samsung
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* specific gpios being registered with gpiolib.
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*
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* The lock protects each gpio bank from multiple access of the shared
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* configuration registers, or from reading of data whilst another thread
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* is writing to the register set.
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*
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* Each chip has its own lock to avoid any contention between different
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* CPU cores trying to get one lock for different GPIO banks, where each
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* bank of GPIO has its own register space and configuration registers.
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*/
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struct samsung_gpio_chip {
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struct gpio_chip chip;
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struct samsung_gpio_cfg *config;
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struct samsung_gpio_pm *pm;
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void __iomem *base;
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int irq_base;
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int group;
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spinlock_t lock;
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#ifdef CONFIG_PM
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u32 pm_save[4];
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#endif
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u32 bitmap_gpio_int;
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};
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static inline struct samsung_gpio_chip *to_samsung_gpio(struct gpio_chip *gpc)
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{
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return container_of(gpc, struct samsung_gpio_chip, chip);
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}
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/**
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* samsung_gpiolib_to_irq - convert gpio pin to irq number
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* @chip: The gpio chip that the pin belongs to.
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* @offset: The offset of the pin in the chip.
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*
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* This helper returns the irq number calculated from the chip->irq_base and
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* the provided offset.
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*/
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extern int samsung_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset);
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/* exported for core SoC support to change */
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extern struct samsung_gpio_cfg s3c24xx_gpiocfg_default;
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#ifdef CONFIG_S3C_GPIO_TRACK
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extern struct samsung_gpio_chip *s3c_gpios[S3C_GPIO_END];
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static inline struct samsung_gpio_chip *samsung_gpiolib_getchip(unsigned int chip)
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{
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return (chip < S3C_GPIO_END) ? s3c_gpios[chip] : NULL;
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}
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#else
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/* machine specific code should provide samsung_gpiolib_getchip */
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extern struct samsung_gpio_chip s3c24xx_gpios[];
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static inline struct samsung_gpio_chip *samsung_gpiolib_getchip(unsigned int pin)
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{
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struct samsung_gpio_chip *chip;
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if (pin > S3C_GPIO_END)
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return NULL;
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chip = &s3c24xx_gpios[pin/32];
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return ((pin - chip->chip.base) < chip->chip.ngpio) ? chip : NULL;
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}
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static inline void s3c_gpiolib_track(struct samsung_gpio_chip *chip) { }
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#endif
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#ifdef CONFIG_PM
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extern struct samsung_gpio_pm samsung_gpio_pm_1bit;
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extern struct samsung_gpio_pm samsung_gpio_pm_2bit;
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extern struct samsung_gpio_pm samsung_gpio_pm_4bit;
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#define __gpio_pm(x) x
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#else
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#define samsung_gpio_pm_1bit NULL
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#define samsung_gpio_pm_2bit NULL
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#define samsung_gpio_pm_4bit NULL
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#define __gpio_pm(x) NULL
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#endif /* CONFIG_PM */
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/* locking wrappers to deal with multiple access to the same gpio bank */
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#define samsung_gpio_lock(_oc, _fl) spin_lock_irqsave(&(_oc)->lock, _fl)
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#define samsung_gpio_unlock(_oc, _fl) spin_unlock_irqrestore(&(_oc)->lock, _fl)
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#endif /* __PLAT_SAMSUNG_GPIO_CORE_H */
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