linux/arch/arm/boot/dts/atlas7-evb.dts
Zhiwu Song 7d76d03b9b ARM: dts: add init dts file for CSR atlas7 SoC
CSR atlas7 uses Network on Chip(NoC) bus architecture, there are dozens
of MARCOs, in each MARCO, there are dozens of hardware modules.

Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com>
Signed-off-by: Hao Liu <Hao.Liu@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2015-01-13 22:19:23 +08:00

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/*
* DTS file for CSR SiRFatlas7 Evaluation Board
*
* Copyright (c) 2014 Cambridge Silicon Radio Limited, a CSR plc group company.
*
* Licensed under GPLv2 or later.
*/
/dts-v1/;
/include/ "atlas7.dtsi"
/ {
model = "CSR SiRFatlas7 Evaluation Board";
compatible = "sirf,atlas7-cb", "sirf,atlas7";
chosen {
bootargs = "console=ttySiRF1,115200 earlyprintk";
};
memory {
device_type = "memory";
reg = <0x40000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
vpp_reserved: vpp_mem@5e800000 {
compatible = "sirf,reserved-memory";
reg = <0x5e800000 0x800000>;
};
nanddisk_reserved: nanddisk@46000000 {
reg = <0x46000000 0x200000>;
no-map;
};
};
noc {
mediam {
nand@17050000 {
memory-region = <&nanddisk_reserved>;
};
};
gnssm {
spi1: spi@18200000 {
status = "okay";
spiflash: macronix@0{
status = "okay";
compatible = "macronix,mx25l6405d";
reg = <0>;
spi-max-frequency = <37500000>;
spi-cpha;
spi-cpol;
#address-cells = <1>;
#size-cells = <1>;
partitions@0 {
label = "myspiboot";
reg = <0x0 0x800000>;
};
};
};
};
btm {
uart6: uart@11000000 {
status = "okay";
sirf,uart-has-rtscts;
};
};
disp-iobg {
vpp@13110000 {
memory-region = <&vpp_reserved>;
};
};
display0: display@0 {
compatible = "lvds-panel";
source = "lvds.0";
bl-gpios = <&gpio_1 63 0>;
data-lines = <24>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <60000000>;
hactive = <1024>;
vactive = <600>;
hfront-porch = <220>;
hback-porch = <100>;
hsync-len = <1>;
vback-porch = <10>;
vfront-porch = <25>;
vsync-len = <1>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
};
};
};
};