99f84cae43
Replace all the pdata-quirks for setting wl12xx/wl18xx platform data with proper DT definitions. Signed-off-by: Eliad Peller <eliad@wizery.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com> Tested-by: Nikita Kiryanov <nikita@compulab.co.il> Tested-by: Tony Lindgren <tony@atomide.com> Acked-by: Kalle Valo <kvalo@codeaurora.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
77 lines
2.0 KiB
Plaintext
77 lines
2.0 KiB
Plaintext
/*
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* Device Tree Source for IGEP COM MODULE Rev. G (TI OMAP AM/DM37x)
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*
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* Copyright (C) 2014 Javier Martinez Canillas <javier@collabora.co.uk>
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* Copyright (C) 2014 Enric Balletbo i Serra <eballetbo@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include "omap3-igep0030-common.dtsi"
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/ {
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model = "IGEP COM MODULE Rev. G (TI OMAP AM/DM37x)";
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compatible = "isee,omap3-igep0030-rev-g", "ti,omap36xx", "ti,omap3";
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/* Regulator to trigger the WL_EN signal of the Wifi module */
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lbep5clwmc_wlen: regulator-lbep5clwmc-wlen {
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compatible = "regulator-fixed";
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regulator-name = "regulator-lbep5clwmc-wlen";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio5 11 GPIO_ACTIVE_HIGH>; /* gpio_139 - WL_EN */
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enable-active-high;
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};
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};
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&omap3_pmx_core {
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lbep5clwmc_pins: pinmux_lbep5clwmc_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT | MUX_MODE4) /* sdmmc2_dat4.gpio_136 - W_IRQ */
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OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat5.gpio_137 - BT_EN */
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OMAP3_CORE1_IOPAD(0x216a, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat7.gpio_139 - WL_EN */
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>;
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};
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leds_pins: pinmux_leds_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x21be, PIN_OUTPUT | MUX_MODE4) /* i2c2_scl.gpio_168 */
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>;
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};
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};
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&i2c2 {
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status = "disabled";
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};
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&leds {
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pinctrl-names = "default";
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pinctrl-0 = <&leds_pins &leds_core2_pins>;
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boot {
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label = "omap3:green:boot";
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gpios = <&gpio6 8 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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};
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&mmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_pins &lbep5clwmc_pins>;
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vmmc-supply = <&lbep5clwmc_wlen>;
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bus-width = <4>;
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non-removable;
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#address-cells = <1>;
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#size-cells = <0>;
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wlcore: wlcore@2 {
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compatible = "ti,wl1835";
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reg = <2>;
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interrupt-parent = <&gpio5>;
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interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; /* gpio 136 */
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};
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};
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