55d3936d30
In mmp2, 6 banks of GPIO registers are supported. So we can support 192 GPIO pins at most. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
37 lines
1.1 KiB
C
37 lines
1.1 KiB
C
#ifndef __ASM_MACH_GPIO_H
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#define __ASM_MACH_GPIO_H
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#include <mach/addr-map.h>
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#include <mach/irqs.h>
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#include <asm-generic/gpio.h>
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#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000)
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#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
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#define GPIO_REG(x) (*((volatile u32 *)(GPIO_REGS_VIRT + (x))))
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#define NR_BUILTIN_GPIO (192)
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#define gpio_to_bank(gpio) ((gpio) >> 5)
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#define gpio_to_irq(gpio) (IRQ_GPIO_START + (gpio))
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#define irq_to_gpio(irq) ((irq) - IRQ_GPIO_START)
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#define __gpio_is_inverted(gpio) (0)
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#define __gpio_is_occupied(gpio) (0)
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/* NOTE: these macros are defined here to make optimization of
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* gpio_{get,set}_value() to work when 'gpio' is a constant.
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* Usage of these macros otherwise is no longer recommended,
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* use generic GPIO API whenever possible.
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*/
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#define GPIO_bit(gpio) (1 << ((gpio) & 0x1f))
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#define GPLR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x00)
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#define GPDR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x0c)
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#define GPSR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x18)
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#define GPCR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x24)
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#include <plat/gpio.h>
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#endif /* __ASM_MACH_GPIO_H */
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