1318 lines
30 KiB
C
1318 lines
30 KiB
C
/* linux/drivers/serial/samsuing.c
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*
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* Driver core for Samsung SoC onboard UARTs.
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*
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* Ben Dooks, Copyright (c) 2003-2005,2008 Simtec Electronics
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* http://armlinux.simtec.co.uk/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/* Hote on 2410 error handling
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*
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* The s3c2410 manual has a love/hate affair with the contents of the
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* UERSTAT register in the UART blocks, and keeps marking some of the
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* error bits as reserved. Having checked with the s3c2410x01,
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* it copes with BREAKs properly, so I am happy to ignore the RESERVED
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* feature from the latter versions of the manual.
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*
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* If it becomes aparrent that latter versions of the 2410 remove these
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* bits, then action will have to be taken to differentiate the versions
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* and change the policy on BREAK
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*
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* BJD, 04-Nov-2004
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*/
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#if defined(CONFIG_SERIAL_SAMSUNG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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#define SUPPORT_SYSRQ
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#endif
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#include <linux/module.h>
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#include <linux/ioport.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/init.h>
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#include <linux/sysrq.h>
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#include <linux/console.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/serial_core.h>
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#include <linux/serial.h>
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#include <linux/delay.h>
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#include <linux/clk.h>
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#include <asm/irq.h>
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#include <mach/hardware.h>
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#include <plat/regs-serial.h>
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#include <mach/regs-gpio.h>
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#include "samsung.h"
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/* UART name and device definitions */
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#define S3C24XX_SERIAL_NAME "ttySAC"
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#define S3C24XX_SERIAL_MAJOR 204
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#define S3C24XX_SERIAL_MINOR 64
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/* we can support 3 uarts, but not always use them */
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#ifdef CONFIG_CPU_S3C2400
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#define NR_PORTS (2)
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#else
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#define NR_PORTS (3)
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#endif
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/* port irq numbers */
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#define TX_IRQ(port) ((port)->irq + 1)
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#define RX_IRQ(port) ((port)->irq)
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/* macros to change one thing to another */
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#define tx_enabled(port) ((port)->unused[0])
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#define rx_enabled(port) ((port)->unused[1])
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/* flag to ignore all characters comming in */
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#define RXSTAT_DUMMY_READ (0x10000000)
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static inline struct s3c24xx_uart_port *to_ourport(struct uart_port *port)
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{
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return container_of(port, struct s3c24xx_uart_port, port);
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}
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/* translate a port to the device name */
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static inline const char *s3c24xx_serial_portname(struct uart_port *port)
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{
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return to_platform_device(port->dev)->name;
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}
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static int s3c24xx_serial_txempty_nofifo(struct uart_port *port)
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{
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return (rd_regl(port, S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE);
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}
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static void s3c24xx_serial_rx_enable(struct uart_port *port)
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{
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unsigned long flags;
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unsigned int ucon, ufcon;
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int count = 10000;
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spin_lock_irqsave(&port->lock, flags);
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while (--count && !s3c24xx_serial_txempty_nofifo(port))
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udelay(100);
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ufcon = rd_regl(port, S3C2410_UFCON);
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ufcon |= S3C2410_UFCON_RESETRX;
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wr_regl(port, S3C2410_UFCON, ufcon);
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ucon = rd_regl(port, S3C2410_UCON);
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ucon |= S3C2410_UCON_RXIRQMODE;
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wr_regl(port, S3C2410_UCON, ucon);
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rx_enabled(port) = 1;
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static void s3c24xx_serial_rx_disable(struct uart_port *port)
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{
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unsigned long flags;
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unsigned int ucon;
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spin_lock_irqsave(&port->lock, flags);
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ucon = rd_regl(port, S3C2410_UCON);
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ucon &= ~S3C2410_UCON_RXIRQMODE;
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wr_regl(port, S3C2410_UCON, ucon);
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rx_enabled(port) = 0;
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static void s3c24xx_serial_stop_tx(struct uart_port *port)
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{
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if (tx_enabled(port)) {
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disable_irq(TX_IRQ(port));
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tx_enabled(port) = 0;
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if (port->flags & UPF_CONS_FLOW)
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s3c24xx_serial_rx_enable(port);
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}
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}
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static void s3c24xx_serial_start_tx(struct uart_port *port)
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{
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if (!tx_enabled(port)) {
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if (port->flags & UPF_CONS_FLOW)
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s3c24xx_serial_rx_disable(port);
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enable_irq(TX_IRQ(port));
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tx_enabled(port) = 1;
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}
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}
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static void s3c24xx_serial_stop_rx(struct uart_port *port)
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{
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if (rx_enabled(port)) {
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dbg("s3c24xx_serial_stop_rx: port=%p\n", port);
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disable_irq(RX_IRQ(port));
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rx_enabled(port) = 0;
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}
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}
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static void s3c24xx_serial_enable_ms(struct uart_port *port)
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{
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}
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static inline struct s3c24xx_uart_info *s3c24xx_port_to_info(struct uart_port *port)
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{
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return to_ourport(port)->info;
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}
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static inline struct s3c2410_uartcfg *s3c24xx_port_to_cfg(struct uart_port *port)
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{
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if (port->dev == NULL)
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return NULL;
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return (struct s3c2410_uartcfg *)port->dev->platform_data;
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}
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static int s3c24xx_serial_rx_fifocnt(struct s3c24xx_uart_port *ourport,
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unsigned long ufstat)
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{
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struct s3c24xx_uart_info *info = ourport->info;
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if (ufstat & info->rx_fifofull)
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return info->fifosize;
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return (ufstat & info->rx_fifomask) >> info->rx_fifoshift;
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}
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/* ? - where has parity gone?? */
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#define S3C2410_UERSTAT_PARITY (0x1000)
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static irqreturn_t
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s3c24xx_serial_rx_chars(int irq, void *dev_id)
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{
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struct s3c24xx_uart_port *ourport = dev_id;
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struct uart_port *port = &ourport->port;
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struct tty_struct *tty = port->info->port.tty;
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unsigned int ufcon, ch, flag, ufstat, uerstat;
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int max_count = 64;
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while (max_count-- > 0) {
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ufcon = rd_regl(port, S3C2410_UFCON);
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ufstat = rd_regl(port, S3C2410_UFSTAT);
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if (s3c24xx_serial_rx_fifocnt(ourport, ufstat) == 0)
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break;
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uerstat = rd_regl(port, S3C2410_UERSTAT);
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ch = rd_regb(port, S3C2410_URXH);
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if (port->flags & UPF_CONS_FLOW) {
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int txe = s3c24xx_serial_txempty_nofifo(port);
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if (rx_enabled(port)) {
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if (!txe) {
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rx_enabled(port) = 0;
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continue;
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}
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} else {
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if (txe) {
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ufcon |= S3C2410_UFCON_RESETRX;
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wr_regl(port, S3C2410_UFCON, ufcon);
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rx_enabled(port) = 1;
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goto out;
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}
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continue;
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}
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}
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/* insert the character into the buffer */
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flag = TTY_NORMAL;
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port->icount.rx++;
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if (unlikely(uerstat & S3C2410_UERSTAT_ANY)) {
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dbg("rxerr: port ch=0x%02x, rxs=0x%08x\n",
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ch, uerstat);
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/* check for break */
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if (uerstat & S3C2410_UERSTAT_BREAK) {
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dbg("break!\n");
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port->icount.brk++;
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if (uart_handle_break(port))
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goto ignore_char;
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}
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if (uerstat & S3C2410_UERSTAT_FRAME)
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port->icount.frame++;
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if (uerstat & S3C2410_UERSTAT_OVERRUN)
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port->icount.overrun++;
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uerstat &= port->read_status_mask;
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if (uerstat & S3C2410_UERSTAT_BREAK)
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flag = TTY_BREAK;
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else if (uerstat & S3C2410_UERSTAT_PARITY)
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flag = TTY_PARITY;
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else if (uerstat & (S3C2410_UERSTAT_FRAME |
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S3C2410_UERSTAT_OVERRUN))
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flag = TTY_FRAME;
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}
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if (uart_handle_sysrq_char(port, ch))
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goto ignore_char;
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uart_insert_char(port, uerstat, S3C2410_UERSTAT_OVERRUN,
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ch, flag);
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ignore_char:
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continue;
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}
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tty_flip_buffer_push(tty);
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out:
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return IRQ_HANDLED;
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}
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static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id)
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{
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struct s3c24xx_uart_port *ourport = id;
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struct uart_port *port = &ourport->port;
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struct circ_buf *xmit = &port->info->xmit;
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int count = 256;
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if (port->x_char) {
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wr_regb(port, S3C2410_UTXH, port->x_char);
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port->icount.tx++;
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port->x_char = 0;
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goto out;
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}
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/* if there isnt anything more to transmit, or the uart is now
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* stopped, disable the uart and exit
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*/
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if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
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s3c24xx_serial_stop_tx(port);
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goto out;
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}
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/* try and drain the buffer... */
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while (!uart_circ_empty(xmit) && count-- > 0) {
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if (rd_regl(port, S3C2410_UFSTAT) & ourport->info->tx_fifofull)
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break;
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wr_regb(port, S3C2410_UTXH, xmit->buf[xmit->tail]);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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port->icount.tx++;
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}
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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if (uart_circ_empty(xmit))
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s3c24xx_serial_stop_tx(port);
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out:
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return IRQ_HANDLED;
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}
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static unsigned int s3c24xx_serial_tx_empty(struct uart_port *port)
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{
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struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
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unsigned long ufstat = rd_regl(port, S3C2410_UFSTAT);
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unsigned long ufcon = rd_regl(port, S3C2410_UFCON);
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if (ufcon & S3C2410_UFCON_FIFOMODE) {
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if ((ufstat & info->tx_fifomask) != 0 ||
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(ufstat & info->tx_fifofull))
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return 0;
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return 1;
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}
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return s3c24xx_serial_txempty_nofifo(port);
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}
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/* no modem control lines */
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static unsigned int s3c24xx_serial_get_mctrl(struct uart_port *port)
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{
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unsigned int umstat = rd_regb(port, S3C2410_UMSTAT);
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if (umstat & S3C2410_UMSTAT_CTS)
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return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
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else
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return TIOCM_CAR | TIOCM_DSR;
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}
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static void s3c24xx_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
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{
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/* todo - possibly remove AFC and do manual CTS */
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}
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static void s3c24xx_serial_break_ctl(struct uart_port *port, int break_state)
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{
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unsigned long flags;
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unsigned int ucon;
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spin_lock_irqsave(&port->lock, flags);
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ucon = rd_regl(port, S3C2410_UCON);
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if (break_state)
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ucon |= S3C2410_UCON_SBREAK;
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else
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ucon &= ~S3C2410_UCON_SBREAK;
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wr_regl(port, S3C2410_UCON, ucon);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static void s3c24xx_serial_shutdown(struct uart_port *port)
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{
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struct s3c24xx_uart_port *ourport = to_ourport(port);
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if (ourport->tx_claimed) {
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free_irq(TX_IRQ(port), ourport);
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tx_enabled(port) = 0;
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ourport->tx_claimed = 0;
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}
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if (ourport->rx_claimed) {
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free_irq(RX_IRQ(port), ourport);
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ourport->rx_claimed = 0;
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rx_enabled(port) = 0;
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}
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}
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static int s3c24xx_serial_startup(struct uart_port *port)
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{
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struct s3c24xx_uart_port *ourport = to_ourport(port);
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int ret;
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dbg("s3c24xx_serial_startup: port=%p (%08lx,%p)\n",
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port->mapbase, port->membase);
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rx_enabled(port) = 1;
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ret = request_irq(RX_IRQ(port),
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s3c24xx_serial_rx_chars, 0,
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s3c24xx_serial_portname(port), ourport);
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if (ret != 0) {
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printk(KERN_ERR "cannot get irq %d\n", RX_IRQ(port));
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return ret;
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}
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ourport->rx_claimed = 1;
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dbg("requesting tx irq...\n");
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tx_enabled(port) = 1;
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ret = request_irq(TX_IRQ(port),
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s3c24xx_serial_tx_chars, 0,
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s3c24xx_serial_portname(port), ourport);
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if (ret) {
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printk(KERN_ERR "cannot get irq %d\n", TX_IRQ(port));
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goto err;
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}
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ourport->tx_claimed = 1;
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dbg("s3c24xx_serial_startup ok\n");
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/* the port reset code should have done the correct
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* register setup for the port controls */
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return ret;
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err:
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s3c24xx_serial_shutdown(port);
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return ret;
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}
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/* power power management control */
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static void s3c24xx_serial_pm(struct uart_port *port, unsigned int level,
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unsigned int old)
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{
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struct s3c24xx_uart_port *ourport = to_ourport(port);
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switch (level) {
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case 3:
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if (!IS_ERR(ourport->baudclk) && ourport->baudclk != NULL)
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clk_disable(ourport->baudclk);
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clk_disable(ourport->clk);
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break;
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case 0:
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clk_enable(ourport->clk);
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if (!IS_ERR(ourport->baudclk) && ourport->baudclk != NULL)
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clk_enable(ourport->baudclk);
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break;
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default:
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printk(KERN_ERR "s3c24xx_serial: unknown pm %d\n", level);
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}
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}
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/* baud rate calculation
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*
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* The UARTs on the S3C2410/S3C2440 can take their clocks from a number
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* of different sources, including the peripheral clock ("pclk") and an
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* external clock ("uclk"). The S3C2440 also adds the core clock ("fclk")
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* with a programmable extra divisor.
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*
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* The following code goes through the clock sources, and calculates the
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* baud clocks (and the resultant actual baud rates) and then tries to
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* pick the closest one and select that.
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*
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*/
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#define MAX_CLKS (8)
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static struct s3c24xx_uart_clksrc tmp_clksrc = {
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.name = "pclk",
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.min_baud = 0,
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.max_baud = 0,
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.divisor = 1,
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};
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static inline int
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s3c24xx_serial_getsource(struct uart_port *port, struct s3c24xx_uart_clksrc *c)
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{
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struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
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return (info->get_clksrc)(port, c);
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}
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static inline int
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s3c24xx_serial_setsource(struct uart_port *port, struct s3c24xx_uart_clksrc *c)
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{
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struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
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return (info->set_clksrc)(port, c);
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}
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struct baud_calc {
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struct s3c24xx_uart_clksrc *clksrc;
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unsigned int calc;
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unsigned int quot;
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struct clk *src;
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};
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|
|
static int s3c24xx_serial_calcbaud(struct baud_calc *calc,
|
|
struct uart_port *port,
|
|
struct s3c24xx_uart_clksrc *clksrc,
|
|
unsigned int baud)
|
|
{
|
|
unsigned long rate;
|
|
|
|
calc->src = clk_get(port->dev, clksrc->name);
|
|
if (calc->src == NULL || IS_ERR(calc->src))
|
|
return 0;
|
|
|
|
rate = clk_get_rate(calc->src);
|
|
rate /= clksrc->divisor;
|
|
|
|
calc->clksrc = clksrc;
|
|
calc->quot = (rate + (8 * baud)) / (16 * baud);
|
|
calc->calc = (rate / (calc->quot * 16));
|
|
|
|
calc->quot--;
|
|
return 1;
|
|
}
|
|
|
|
static unsigned int s3c24xx_serial_getclk(struct uart_port *port,
|
|
struct s3c24xx_uart_clksrc **clksrc,
|
|
struct clk **clk,
|
|
unsigned int baud)
|
|
{
|
|
struct s3c2410_uartcfg *cfg = s3c24xx_port_to_cfg(port);
|
|
struct s3c24xx_uart_clksrc *clkp;
|
|
struct baud_calc res[MAX_CLKS];
|
|
struct baud_calc *resptr, *best, *sptr;
|
|
int i;
|
|
|
|
clkp = cfg->clocks;
|
|
best = NULL;
|
|
|
|
if (cfg->clocks_size < 2) {
|
|
if (cfg->clocks_size == 0)
|
|
clkp = &tmp_clksrc;
|
|
|
|
/* check to see if we're sourcing fclk, and if so we're
|
|
* going to have to update the clock source
|
|
*/
|
|
|
|
if (strcmp(clkp->name, "fclk") == 0) {
|
|
struct s3c24xx_uart_clksrc src;
|
|
|
|
s3c24xx_serial_getsource(port, &src);
|
|
|
|
/* check that the port already using fclk, and if
|
|
* not, then re-select fclk
|
|
*/
|
|
|
|
if (strcmp(src.name, clkp->name) == 0) {
|
|
s3c24xx_serial_setsource(port, clkp);
|
|
s3c24xx_serial_getsource(port, &src);
|
|
}
|
|
|
|
clkp->divisor = src.divisor;
|
|
}
|
|
|
|
s3c24xx_serial_calcbaud(res, port, clkp, baud);
|
|
best = res;
|
|
resptr = best + 1;
|
|
} else {
|
|
resptr = res;
|
|
|
|
for (i = 0; i < cfg->clocks_size; i++, clkp++) {
|
|
if (s3c24xx_serial_calcbaud(resptr, port, clkp, baud))
|
|
resptr++;
|
|
}
|
|
}
|
|
|
|
/* ok, we now need to select the best clock we found */
|
|
|
|
if (!best) {
|
|
unsigned int deviation = (1<<30)|((1<<30)-1);
|
|
int calc_deviation;
|
|
|
|
for (sptr = res; sptr < resptr; sptr++) {
|
|
calc_deviation = baud - sptr->calc;
|
|
if (calc_deviation < 0)
|
|
calc_deviation = -calc_deviation;
|
|
|
|
if (calc_deviation < deviation) {
|
|
best = sptr;
|
|
deviation = calc_deviation;
|
|
}
|
|
}
|
|
}
|
|
|
|
/* store results to pass back */
|
|
|
|
*clksrc = best->clksrc;
|
|
*clk = best->src;
|
|
|
|
return best->quot;
|
|
}
|
|
|
|
static void s3c24xx_serial_set_termios(struct uart_port *port,
|
|
struct ktermios *termios,
|
|
struct ktermios *old)
|
|
{
|
|
struct s3c2410_uartcfg *cfg = s3c24xx_port_to_cfg(port);
|
|
struct s3c24xx_uart_port *ourport = to_ourport(port);
|
|
struct s3c24xx_uart_clksrc *clksrc = NULL;
|
|
struct clk *clk = NULL;
|
|
unsigned long flags;
|
|
unsigned int baud, quot;
|
|
unsigned int ulcon;
|
|
unsigned int umcon;
|
|
|
|
/*
|
|
* We don't support modem control lines.
|
|
*/
|
|
termios->c_cflag &= ~(HUPCL | CMSPAR);
|
|
termios->c_cflag |= CLOCAL;
|
|
|
|
/*
|
|
* Ask the core to calculate the divisor for us.
|
|
*/
|
|
|
|
baud = uart_get_baud_rate(port, termios, old, 0, 115200*8);
|
|
|
|
if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST)
|
|
quot = port->custom_divisor;
|
|
else
|
|
quot = s3c24xx_serial_getclk(port, &clksrc, &clk, baud);
|
|
|
|
/* check to see if we need to change clock source */
|
|
|
|
if (ourport->clksrc != clksrc || ourport->baudclk != clk) {
|
|
s3c24xx_serial_setsource(port, clksrc);
|
|
|
|
if (ourport->baudclk != NULL && !IS_ERR(ourport->baudclk)) {
|
|
clk_disable(ourport->baudclk);
|
|
ourport->baudclk = NULL;
|
|
}
|
|
|
|
clk_enable(clk);
|
|
|
|
ourport->clksrc = clksrc;
|
|
ourport->baudclk = clk;
|
|
}
|
|
|
|
switch (termios->c_cflag & CSIZE) {
|
|
case CS5:
|
|
dbg("config: 5bits/char\n");
|
|
ulcon = S3C2410_LCON_CS5;
|
|
break;
|
|
case CS6:
|
|
dbg("config: 6bits/char\n");
|
|
ulcon = S3C2410_LCON_CS6;
|
|
break;
|
|
case CS7:
|
|
dbg("config: 7bits/char\n");
|
|
ulcon = S3C2410_LCON_CS7;
|
|
break;
|
|
case CS8:
|
|
default:
|
|
dbg("config: 8bits/char\n");
|
|
ulcon = S3C2410_LCON_CS8;
|
|
break;
|
|
}
|
|
|
|
/* preserve original lcon IR settings */
|
|
ulcon |= (cfg->ulcon & S3C2410_LCON_IRM);
|
|
|
|
if (termios->c_cflag & CSTOPB)
|
|
ulcon |= S3C2410_LCON_STOPB;
|
|
|
|
umcon = (termios->c_cflag & CRTSCTS) ? S3C2410_UMCOM_AFC : 0;
|
|
|
|
if (termios->c_cflag & PARENB) {
|
|
if (termios->c_cflag & PARODD)
|
|
ulcon |= S3C2410_LCON_PODD;
|
|
else
|
|
ulcon |= S3C2410_LCON_PEVEN;
|
|
} else {
|
|
ulcon |= S3C2410_LCON_PNONE;
|
|
}
|
|
|
|
spin_lock_irqsave(&port->lock, flags);
|
|
|
|
dbg("setting ulcon to %08x, brddiv to %d\n", ulcon, quot);
|
|
|
|
wr_regl(port, S3C2410_ULCON, ulcon);
|
|
wr_regl(port, S3C2410_UBRDIV, quot);
|
|
wr_regl(port, S3C2410_UMCON, umcon);
|
|
|
|
dbg("uart: ulcon = 0x%08x, ucon = 0x%08x, ufcon = 0x%08x\n",
|
|
rd_regl(port, S3C2410_ULCON),
|
|
rd_regl(port, S3C2410_UCON),
|
|
rd_regl(port, S3C2410_UFCON));
|
|
|
|
/*
|
|
* Update the per-port timeout.
|
|
*/
|
|
uart_update_timeout(port, termios->c_cflag, baud);
|
|
|
|
/*
|
|
* Which character status flags are we interested in?
|
|
*/
|
|
port->read_status_mask = S3C2410_UERSTAT_OVERRUN;
|
|
if (termios->c_iflag & INPCK)
|
|
port->read_status_mask |= S3C2410_UERSTAT_FRAME | S3C2410_UERSTAT_PARITY;
|
|
|
|
/*
|
|
* Which character status flags should we ignore?
|
|
*/
|
|
port->ignore_status_mask = 0;
|
|
if (termios->c_iflag & IGNPAR)
|
|
port->ignore_status_mask |= S3C2410_UERSTAT_OVERRUN;
|
|
if (termios->c_iflag & IGNBRK && termios->c_iflag & IGNPAR)
|
|
port->ignore_status_mask |= S3C2410_UERSTAT_FRAME;
|
|
|
|
/*
|
|
* Ignore all characters if CREAD is not set.
|
|
*/
|
|
if ((termios->c_cflag & CREAD) == 0)
|
|
port->ignore_status_mask |= RXSTAT_DUMMY_READ;
|
|
|
|
spin_unlock_irqrestore(&port->lock, flags);
|
|
}
|
|
|
|
static const char *s3c24xx_serial_type(struct uart_port *port)
|
|
{
|
|
switch (port->type) {
|
|
case PORT_S3C2410:
|
|
return "S3C2410";
|
|
case PORT_S3C2440:
|
|
return "S3C2440";
|
|
case PORT_S3C2412:
|
|
return "S3C2412";
|
|
default:
|
|
return NULL;
|
|
}
|
|
}
|
|
|
|
#define MAP_SIZE (0x100)
|
|
|
|
static void s3c24xx_serial_release_port(struct uart_port *port)
|
|
{
|
|
release_mem_region(port->mapbase, MAP_SIZE);
|
|
}
|
|
|
|
static int s3c24xx_serial_request_port(struct uart_port *port)
|
|
{
|
|
const char *name = s3c24xx_serial_portname(port);
|
|
return request_mem_region(port->mapbase, MAP_SIZE, name) ? 0 : -EBUSY;
|
|
}
|
|
|
|
static void s3c24xx_serial_config_port(struct uart_port *port, int flags)
|
|
{
|
|
struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
|
|
|
|
if (flags & UART_CONFIG_TYPE &&
|
|
s3c24xx_serial_request_port(port) == 0)
|
|
port->type = info->type;
|
|
}
|
|
|
|
/*
|
|
* verify the new serial_struct (for TIOCSSERIAL).
|
|
*/
|
|
static int
|
|
s3c24xx_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
|
|
{
|
|
struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
|
|
|
|
if (ser->type != PORT_UNKNOWN && ser->type != info->type)
|
|
return -EINVAL;
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
#ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE
|
|
|
|
static struct console s3c24xx_serial_console;
|
|
|
|
#define S3C24XX_SERIAL_CONSOLE &s3c24xx_serial_console
|
|
#else
|
|
#define S3C24XX_SERIAL_CONSOLE NULL
|
|
#endif
|
|
|
|
static struct uart_ops s3c24xx_serial_ops = {
|
|
.pm = s3c24xx_serial_pm,
|
|
.tx_empty = s3c24xx_serial_tx_empty,
|
|
.get_mctrl = s3c24xx_serial_get_mctrl,
|
|
.set_mctrl = s3c24xx_serial_set_mctrl,
|
|
.stop_tx = s3c24xx_serial_stop_tx,
|
|
.start_tx = s3c24xx_serial_start_tx,
|
|
.stop_rx = s3c24xx_serial_stop_rx,
|
|
.enable_ms = s3c24xx_serial_enable_ms,
|
|
.break_ctl = s3c24xx_serial_break_ctl,
|
|
.startup = s3c24xx_serial_startup,
|
|
.shutdown = s3c24xx_serial_shutdown,
|
|
.set_termios = s3c24xx_serial_set_termios,
|
|
.type = s3c24xx_serial_type,
|
|
.release_port = s3c24xx_serial_release_port,
|
|
.request_port = s3c24xx_serial_request_port,
|
|
.config_port = s3c24xx_serial_config_port,
|
|
.verify_port = s3c24xx_serial_verify_port,
|
|
};
|
|
|
|
|
|
static struct uart_driver s3c24xx_uart_drv = {
|
|
.owner = THIS_MODULE,
|
|
.dev_name = "s3c2410_serial",
|
|
.nr = 3,
|
|
.cons = S3C24XX_SERIAL_CONSOLE,
|
|
.driver_name = S3C24XX_SERIAL_NAME,
|
|
.major = S3C24XX_SERIAL_MAJOR,
|
|
.minor = S3C24XX_SERIAL_MINOR,
|
|
};
|
|
|
|
static struct s3c24xx_uart_port s3c24xx_serial_ports[NR_PORTS] = {
|
|
[0] = {
|
|
.port = {
|
|
.lock = __SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[0].port.lock),
|
|
.iotype = UPIO_MEM,
|
|
.irq = IRQ_S3CUART_RX0,
|
|
.uartclk = 0,
|
|
.fifosize = 16,
|
|
.ops = &s3c24xx_serial_ops,
|
|
.flags = UPF_BOOT_AUTOCONF,
|
|
.line = 0,
|
|
}
|
|
},
|
|
[1] = {
|
|
.port = {
|
|
.lock = __SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[1].port.lock),
|
|
.iotype = UPIO_MEM,
|
|
.irq = IRQ_S3CUART_RX1,
|
|
.uartclk = 0,
|
|
.fifosize = 16,
|
|
.ops = &s3c24xx_serial_ops,
|
|
.flags = UPF_BOOT_AUTOCONF,
|
|
.line = 1,
|
|
}
|
|
},
|
|
#if NR_PORTS > 2
|
|
|
|
[2] = {
|
|
.port = {
|
|
.lock = __SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[2].port.lock),
|
|
.iotype = UPIO_MEM,
|
|
.irq = IRQ_S3CUART_RX2,
|
|
.uartclk = 0,
|
|
.fifosize = 16,
|
|
.ops = &s3c24xx_serial_ops,
|
|
.flags = UPF_BOOT_AUTOCONF,
|
|
.line = 2,
|
|
}
|
|
}
|
|
#endif
|
|
};
|
|
|
|
/* s3c24xx_serial_resetport
|
|
*
|
|
* wrapper to call the specific reset for this port (reset the fifos
|
|
* and the settings)
|
|
*/
|
|
|
|
static inline int s3c24xx_serial_resetport(struct uart_port *port,
|
|
struct s3c2410_uartcfg *cfg)
|
|
{
|
|
struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
|
|
|
|
return (info->reset_port)(port, cfg);
|
|
}
|
|
|
|
/* s3c24xx_serial_init_port
|
|
*
|
|
* initialise a single serial port from the platform device given
|
|
*/
|
|
|
|
static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
|
|
struct s3c24xx_uart_info *info,
|
|
struct platform_device *platdev)
|
|
{
|
|
struct uart_port *port = &ourport->port;
|
|
struct s3c2410_uartcfg *cfg;
|
|
struct resource *res;
|
|
int ret;
|
|
|
|
dbg("s3c24xx_serial_init_port: port=%p, platdev=%p\n", port, platdev);
|
|
|
|
if (platdev == NULL)
|
|
return -ENODEV;
|
|
|
|
cfg = s3c24xx_dev_to_cfg(&platdev->dev);
|
|
|
|
if (port->mapbase != 0)
|
|
return 0;
|
|
|
|
if (cfg->hwport > 3)
|
|
return -EINVAL;
|
|
|
|
/* setup info for port */
|
|
port->dev = &platdev->dev;
|
|
ourport->info = info;
|
|
|
|
/* copy the info in from provided structure */
|
|
ourport->port.fifosize = info->fifosize;
|
|
|
|
dbg("s3c24xx_serial_init_port: %p (hw %d)...\n", port, cfg->hwport);
|
|
|
|
port->uartclk = 1;
|
|
|
|
if (cfg->uart_flags & UPF_CONS_FLOW) {
|
|
dbg("s3c24xx_serial_init_port: enabling flow control\n");
|
|
port->flags |= UPF_CONS_FLOW;
|
|
}
|
|
|
|
/* sort our the physical and virtual addresses for each UART */
|
|
|
|
res = platform_get_resource(platdev, IORESOURCE_MEM, 0);
|
|
if (res == NULL) {
|
|
printk(KERN_ERR "failed to find memory resource for uart\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
dbg("resource %p (%lx..%lx)\n", res, res->start, res->end);
|
|
|
|
port->mapbase = res->start;
|
|
port->membase = S3C24XX_VA_UART + (res->start - S3C24XX_PA_UART);
|
|
ret = platform_get_irq(platdev, 0);
|
|
if (ret < 0)
|
|
port->irq = 0;
|
|
else
|
|
port->irq = ret;
|
|
|
|
ourport->clk = clk_get(&platdev->dev, "uart");
|
|
|
|
dbg("port: map=%08x, mem=%08x, irq=%d, clock=%ld\n",
|
|
port->mapbase, port->membase, port->irq, port->uartclk);
|
|
|
|
/* reset the fifos (and setup the uart) */
|
|
s3c24xx_serial_resetport(port, cfg);
|
|
return 0;
|
|
}
|
|
|
|
static ssize_t s3c24xx_serial_show_clksrc(struct device *dev,
|
|
struct device_attribute *attr,
|
|
char *buf)
|
|
{
|
|
struct uart_port *port = s3c24xx_dev_to_port(dev);
|
|
struct s3c24xx_uart_port *ourport = to_ourport(port);
|
|
|
|
return snprintf(buf, PAGE_SIZE, "* %s\n", ourport->clksrc->name);
|
|
}
|
|
|
|
static DEVICE_ATTR(clock_source, S_IRUGO, s3c24xx_serial_show_clksrc, NULL);
|
|
|
|
/* Device driver serial port probe */
|
|
|
|
static int probe_index;
|
|
|
|
int s3c24xx_serial_probe(struct platform_device *dev,
|
|
struct s3c24xx_uart_info *info)
|
|
{
|
|
struct s3c24xx_uart_port *ourport;
|
|
int ret;
|
|
|
|
dbg("s3c24xx_serial_probe(%p, %p) %d\n", dev, info, probe_index);
|
|
|
|
ourport = &s3c24xx_serial_ports[probe_index];
|
|
probe_index++;
|
|
|
|
dbg("%s: initialising port %p...\n", __func__, ourport);
|
|
|
|
ret = s3c24xx_serial_init_port(ourport, info, dev);
|
|
if (ret < 0)
|
|
goto probe_err;
|
|
|
|
dbg("%s: adding port\n", __func__);
|
|
uart_add_one_port(&s3c24xx_uart_drv, &ourport->port);
|
|
platform_set_drvdata(dev, &ourport->port);
|
|
|
|
ret = device_create_file(&dev->dev, &dev_attr_clock_source);
|
|
if (ret < 0)
|
|
printk(KERN_ERR "%s: failed to add clksrc attr.\n", __func__);
|
|
|
|
return 0;
|
|
|
|
probe_err:
|
|
return ret;
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(s3c24xx_serial_probe);
|
|
|
|
int s3c24xx_serial_remove(struct platform_device *dev)
|
|
{
|
|
struct uart_port *port = s3c24xx_dev_to_port(&dev->dev);
|
|
|
|
if (port) {
|
|
device_remove_file(&dev->dev, &dev_attr_clock_source);
|
|
uart_remove_one_port(&s3c24xx_uart_drv, port);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(s3c24xx_serial_remove);
|
|
|
|
/* UART power management code */
|
|
|
|
#ifdef CONFIG_PM
|
|
|
|
static int s3c24xx_serial_suspend(struct platform_device *dev, pm_message_t state)
|
|
{
|
|
struct uart_port *port = s3c24xx_dev_to_port(&dev->dev);
|
|
|
|
if (port)
|
|
uart_suspend_port(&s3c24xx_uart_drv, port);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int s3c24xx_serial_resume(struct platform_device *dev)
|
|
{
|
|
struct uart_port *port = s3c24xx_dev_to_port(&dev->dev);
|
|
struct s3c24xx_uart_port *ourport = to_ourport(port);
|
|
|
|
if (port) {
|
|
clk_enable(ourport->clk);
|
|
s3c24xx_serial_resetport(port, s3c24xx_port_to_cfg(port));
|
|
clk_disable(ourport->clk);
|
|
|
|
uart_resume_port(&s3c24xx_uart_drv, port);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
int s3c24xx_serial_init(struct platform_driver *drv,
|
|
struct s3c24xx_uart_info *info)
|
|
{
|
|
dbg("s3c24xx_serial_init(%p,%p)\n", drv, info);
|
|
|
|
#ifdef CONFIG_PM
|
|
drv->suspend = s3c24xx_serial_suspend;
|
|
drv->resume = s3c24xx_serial_resume;
|
|
#endif
|
|
|
|
return platform_driver_register(drv);
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(s3c24xx_serial_init);
|
|
|
|
/* module initialisation code */
|
|
|
|
static int __init s3c24xx_serial_modinit(void)
|
|
{
|
|
int ret;
|
|
|
|
ret = uart_register_driver(&s3c24xx_uart_drv);
|
|
if (ret < 0) {
|
|
printk(KERN_ERR "failed to register UART driver\n");
|
|
return -1;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void __exit s3c24xx_serial_modexit(void)
|
|
{
|
|
uart_unregister_driver(&s3c24xx_uart_drv);
|
|
}
|
|
|
|
module_init(s3c24xx_serial_modinit);
|
|
module_exit(s3c24xx_serial_modexit);
|
|
|
|
/* Console code */
|
|
|
|
#ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE
|
|
|
|
static struct uart_port *cons_uart;
|
|
|
|
static int
|
|
s3c24xx_serial_console_txrdy(struct uart_port *port, unsigned int ufcon)
|
|
{
|
|
struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
|
|
unsigned long ufstat, utrstat;
|
|
|
|
if (ufcon & S3C2410_UFCON_FIFOMODE) {
|
|
/* fifo mode - check ammount of data in fifo registers... */
|
|
|
|
ufstat = rd_regl(port, S3C2410_UFSTAT);
|
|
return (ufstat & info->tx_fifofull) ? 0 : 1;
|
|
}
|
|
|
|
/* in non-fifo mode, we go and use the tx buffer empty */
|
|
|
|
utrstat = rd_regl(port, S3C2410_UTRSTAT);
|
|
return (utrstat & S3C2410_UTRSTAT_TXE) ? 1 : 0;
|
|
}
|
|
|
|
static void
|
|
s3c24xx_serial_console_putchar(struct uart_port *port, int ch)
|
|
{
|
|
unsigned int ufcon = rd_regl(cons_uart, S3C2410_UFCON);
|
|
while (!s3c24xx_serial_console_txrdy(port, ufcon))
|
|
barrier();
|
|
wr_regb(cons_uart, S3C2410_UTXH, ch);
|
|
}
|
|
|
|
static void
|
|
s3c24xx_serial_console_write(struct console *co, const char *s,
|
|
unsigned int count)
|
|
{
|
|
uart_console_write(cons_uart, s, count, s3c24xx_serial_console_putchar);
|
|
}
|
|
|
|
static void __init
|
|
s3c24xx_serial_get_options(struct uart_port *port, int *baud,
|
|
int *parity, int *bits)
|
|
{
|
|
struct s3c24xx_uart_clksrc clksrc;
|
|
struct clk *clk;
|
|
unsigned int ulcon;
|
|
unsigned int ucon;
|
|
unsigned int ubrdiv;
|
|
unsigned long rate;
|
|
|
|
ulcon = rd_regl(port, S3C2410_ULCON);
|
|
ucon = rd_regl(port, S3C2410_UCON);
|
|
ubrdiv = rd_regl(port, S3C2410_UBRDIV);
|
|
|
|
dbg("s3c24xx_serial_get_options: port=%p\n"
|
|
"registers: ulcon=%08x, ucon=%08x, ubdriv=%08x\n",
|
|
port, ulcon, ucon, ubrdiv);
|
|
|
|
if ((ucon & 0xf) != 0) {
|
|
/* consider the serial port configured if the tx/rx mode set */
|
|
|
|
switch (ulcon & S3C2410_LCON_CSMASK) {
|
|
case S3C2410_LCON_CS5:
|
|
*bits = 5;
|
|
break;
|
|
case S3C2410_LCON_CS6:
|
|
*bits = 6;
|
|
break;
|
|
case S3C2410_LCON_CS7:
|
|
*bits = 7;
|
|
break;
|
|
default:
|
|
case S3C2410_LCON_CS8:
|
|
*bits = 8;
|
|
break;
|
|
}
|
|
|
|
switch (ulcon & S3C2410_LCON_PMASK) {
|
|
case S3C2410_LCON_PEVEN:
|
|
*parity = 'e';
|
|
break;
|
|
|
|
case S3C2410_LCON_PODD:
|
|
*parity = 'o';
|
|
break;
|
|
|
|
case S3C2410_LCON_PNONE:
|
|
default:
|
|
*parity = 'n';
|
|
}
|
|
|
|
/* now calculate the baud rate */
|
|
|
|
s3c24xx_serial_getsource(port, &clksrc);
|
|
|
|
clk = clk_get(port->dev, clksrc.name);
|
|
if (!IS_ERR(clk) && clk != NULL)
|
|
rate = clk_get_rate(clk) / clksrc.divisor;
|
|
else
|
|
rate = 1;
|
|
|
|
|
|
*baud = rate / (16 * (ubrdiv + 1));
|
|
dbg("calculated baud %d\n", *baud);
|
|
}
|
|
|
|
}
|
|
|
|
/* s3c24xx_serial_init_ports
|
|
*
|
|
* initialise the serial ports from the machine provided initialisation
|
|
* data.
|
|
*/
|
|
|
|
static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info *info)
|
|
{
|
|
struct s3c24xx_uart_port *ptr = s3c24xx_serial_ports;
|
|
struct platform_device **platdev_ptr;
|
|
int i;
|
|
|
|
dbg("s3c24xx_serial_init_ports: initialising ports...\n");
|
|
|
|
platdev_ptr = s3c24xx_uart_devs;
|
|
|
|
for (i = 0; i < NR_PORTS; i++, ptr++, platdev_ptr++) {
|
|
s3c24xx_serial_init_port(ptr, info, *platdev_ptr);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int __init
|
|
s3c24xx_serial_console_setup(struct console *co, char *options)
|
|
{
|
|
struct uart_port *port;
|
|
int baud = 9600;
|
|
int bits = 8;
|
|
int parity = 'n';
|
|
int flow = 'n';
|
|
|
|
dbg("s3c24xx_serial_console_setup: co=%p (%d), %s\n",
|
|
co, co->index, options);
|
|
|
|
/* is this a valid port */
|
|
|
|
if (co->index == -1 || co->index >= NR_PORTS)
|
|
co->index = 0;
|
|
|
|
port = &s3c24xx_serial_ports[co->index].port;
|
|
|
|
/* is the port configured? */
|
|
|
|
if (port->mapbase == 0x0) {
|
|
co->index = 0;
|
|
port = &s3c24xx_serial_ports[co->index].port;
|
|
}
|
|
|
|
cons_uart = port;
|
|
|
|
dbg("s3c24xx_serial_console_setup: port=%p (%d)\n", port, co->index);
|
|
|
|
/*
|
|
* Check whether an invalid uart number has been specified, and
|
|
* if so, search for the first available port that does have
|
|
* console support.
|
|
*/
|
|
if (options)
|
|
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
|
else
|
|
s3c24xx_serial_get_options(port, &baud, &parity, &bits);
|
|
|
|
dbg("s3c24xx_serial_console_setup: baud %d\n", baud);
|
|
|
|
return uart_set_options(port, co, baud, parity, bits, flow);
|
|
}
|
|
|
|
/* s3c24xx_serial_initconsole
|
|
*
|
|
* initialise the console from one of the uart drivers
|
|
*/
|
|
|
|
static struct console s3c24xx_serial_console = {
|
|
.name = S3C24XX_SERIAL_NAME,
|
|
.device = uart_console_device,
|
|
.flags = CON_PRINTBUFFER,
|
|
.index = -1,
|
|
.write = s3c24xx_serial_console_write,
|
|
.setup = s3c24xx_serial_console_setup
|
|
};
|
|
|
|
int s3c24xx_serial_initconsole(struct platform_driver *drv,
|
|
struct s3c24xx_uart_info *info)
|
|
|
|
{
|
|
struct platform_device *dev = s3c24xx_uart_devs[0];
|
|
|
|
dbg("s3c24xx_serial_initconsole\n");
|
|
|
|
/* select driver based on the cpu */
|
|
|
|
if (dev == NULL) {
|
|
printk(KERN_ERR "s3c24xx: no devices for console init\n");
|
|
return 0;
|
|
}
|
|
|
|
if (strcmp(dev->name, drv->driver.name) != 0)
|
|
return 0;
|
|
|
|
s3c24xx_serial_console.data = &s3c24xx_uart_drv;
|
|
s3c24xx_serial_init_ports(info);
|
|
|
|
register_console(&s3c24xx_serial_console);
|
|
return 0;
|
|
}
|
|
|
|
#endif /* CONFIG_SERIAL_SAMSUNG_CONSOLE */
|
|
|
|
MODULE_DESCRIPTION("Samsung SoC Serial port driver");
|
|
MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
|
|
MODULE_LICENSE("GPL v2");
|