linux/arch/riscv/include
Palmer Dabbelt 35728cac17 RISC-V: Upgrade smp_mb__after_spinlock() to iorw,iorw
[ Upstream commit 38b7c2a3ff ]

While digging through the recent mmiowb preemption issue it came up that
we aren't actually preventing IO from crossing a scheduling boundary.
While it's a bit ugly to overload smp_mb__after_spinlock() with this
behavior, it's what PowerPC is doing so there's some precedent.

Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-07-29 10:18:40 +02:00
..
asm RISC-V: Upgrade smp_mb__after_spinlock() to iorw,iorw 2020-07-29 10:18:40 +02:00
uapi/asm riscv: Add support for perf registers sampling 2019-09-05 00:48:58 -07:00