2d888f48e0
Emulate deprecated 'setend' instruction for AArch32 bit tasks. setend [le/be] - Sets the endianness of EL0 On systems with CPUs which support mixed endian at EL0, the hardware support for the instruction can be enabled by setting the SCTLR_EL1.SED bit. Like the other emulated instructions it is controlled by an entry in /proc/sys/abi/. For more information see : Documentation/arm64/legacy_instructions.txt The instruction is emulated by setting/clearing the SPSR_EL1.E bit, which will be reflected in the PSTATE.E in AArch32 context. This patch also restores the native endianness for the execution of signal handlers, since the process could have changed the endianness. Note: All CPUs on the system must have mixed endian support at EL0. Once the handler is registered, hotplugging a CPU which doesn't support mixed endian, could lead to unexpected results/behavior in applications. Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
678 lines
18 KiB
Plaintext
678 lines
18 KiB
Plaintext
config ARM64
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def_bool y
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select ARCH_BINFMT_ELF_RANDOMIZE_PIE
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select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
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select ARCH_HAS_GCOV_PROFILE_ALL
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select ARCH_HAS_SG_CHAIN
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select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
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select ARCH_USE_CMPXCHG_LOCKREF
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select ARCH_SUPPORTS_ATOMIC_RMW
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select ARCH_WANT_OPTIONAL_GPIOLIB
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select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
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select ARCH_WANT_FRAME_POINTERS
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select ARM_AMBA
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select ARM_ARCH_TIMER
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select ARM_GIC
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select AUDIT_ARCH_COMPAT_GENERIC
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select ARM_GIC_V2M if PCI_MSI
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select ARM_GIC_V3
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select ARM_GIC_V3_ITS if PCI_MSI
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select BUILDTIME_EXTABLE_SORT
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select CLONE_BACKWARDS
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select COMMON_CLK
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select CPU_PM if (SUSPEND || CPU_IDLE)
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select DCACHE_WORD_ACCESS
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select GENERIC_ALLOCATOR
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select GENERIC_CLOCKEVENTS
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select GENERIC_CLOCKEVENTS_BROADCAST if SMP
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select GENERIC_CPU_AUTOPROBE
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select GENERIC_EARLY_IOREMAP
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select GENERIC_IRQ_PROBE
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select GENERIC_IRQ_SHOW
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select GENERIC_PCI_IOMAP
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select GENERIC_SCHED_CLOCK
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select GENERIC_SMP_IDLE_THREAD
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select GENERIC_STRNCPY_FROM_USER
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select GENERIC_STRNLEN_USER
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select GENERIC_TIME_VSYSCALL
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select HANDLE_DOMAIN_IRQ
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select HARDIRQS_SW_RESEND
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select HAVE_ALIGNED_STRUCT_PAGE if SLUB
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select HAVE_ARCH_AUDITSYSCALL
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select HAVE_ARCH_JUMP_LABEL
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select HAVE_ARCH_KGDB
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select HAVE_ARCH_SECCOMP_FILTER
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select HAVE_ARCH_TRACEHOOK
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select HAVE_BPF_JIT
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select HAVE_C_RECORDMCOUNT
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select HAVE_CC_STACKPROTECTOR
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select HAVE_CMPXCHG_DOUBLE
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select HAVE_DEBUG_BUGVERBOSE
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select HAVE_DEBUG_KMEMLEAK
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select HAVE_DMA_API_DEBUG
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select HAVE_DMA_ATTRS
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select HAVE_DMA_CONTIGUOUS
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select HAVE_DYNAMIC_FTRACE
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select HAVE_EFFICIENT_UNALIGNED_ACCESS
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select HAVE_FTRACE_MCOUNT_RECORD
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select HAVE_FUNCTION_TRACER
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select HAVE_FUNCTION_GRAPH_TRACER
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select HAVE_GENERIC_DMA_COHERENT
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select HAVE_HW_BREAKPOINT if PERF_EVENTS
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select HAVE_MEMBLOCK
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select HAVE_PATA_PLATFORM
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select HAVE_PERF_EVENTS
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select HAVE_PERF_REGS
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select HAVE_PERF_USER_STACK_DUMP
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select HAVE_RCU_TABLE_FREE
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select HAVE_SYSCALL_TRACEPOINTS
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select IRQ_DOMAIN
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select MODULES_USE_ELF_RELA
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select NO_BOOTMEM
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select OF
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select OF_EARLY_FLATTREE
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select OF_RESERVED_MEM
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select PERF_USE_VMALLOC
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select POWER_RESET
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select POWER_SUPPLY
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select RTC_LIB
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select SPARSE_IRQ
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select SYSCTL_EXCEPTION_TRACE
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select HAVE_CONTEXT_TRACKING
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help
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ARM 64-bit (AArch64) Linux support.
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config 64BIT
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def_bool y
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config ARCH_PHYS_ADDR_T_64BIT
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def_bool y
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config MMU
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def_bool y
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config NO_IOPORT_MAP
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def_bool y if !PCI
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config STACKTRACE_SUPPORT
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def_bool y
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config LOCKDEP_SUPPORT
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def_bool y
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config TRACE_IRQFLAGS_SUPPORT
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def_bool y
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config RWSEM_XCHGADD_ALGORITHM
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def_bool y
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config GENERIC_HWEIGHT
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def_bool y
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config GENERIC_CSUM
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def_bool y
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config GENERIC_CALIBRATE_DELAY
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def_bool y
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config ZONE_DMA
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def_bool y
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config HAVE_GENERIC_RCU_GUP
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def_bool y
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config ARCH_DMA_ADDR_T_64BIT
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def_bool y
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config NEED_DMA_MAP_STATE
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def_bool y
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config NEED_SG_DMA_LENGTH
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def_bool y
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config SWIOTLB
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def_bool y
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config IOMMU_HELPER
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def_bool SWIOTLB
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config KERNEL_MODE_NEON
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def_bool y
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config FIX_EARLYCON_MEM
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def_bool y
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source "init/Kconfig"
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source "kernel/Kconfig.freezer"
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menu "Platform selection"
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config ARCH_SEATTLE
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bool "AMD Seattle SoC Family"
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help
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This enables support for AMD Seattle SOC Family
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config ARCH_THUNDER
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bool "Cavium Inc. Thunder SoC Family"
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help
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This enables support for Cavium's Thunder Family of SoCs.
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config ARCH_VEXPRESS
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bool "ARMv8 software model (Versatile Express)"
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select ARCH_REQUIRE_GPIOLIB
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select COMMON_CLK_VERSATILE
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select POWER_RESET_VEXPRESS
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select VEXPRESS_CONFIG
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help
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This enables support for the ARMv8 software model (Versatile
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Express).
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config ARCH_XGENE
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bool "AppliedMicro X-Gene SOC Family"
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help
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This enables support for AppliedMicro X-Gene SOC Family
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endmenu
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menu "Bus support"
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config PCI
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bool "PCI support"
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help
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This feature enables support for PCI bus system. If you say Y
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here, the kernel will include drivers and infrastructure code
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to support PCI bus devices.
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config PCI_DOMAINS
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def_bool PCI
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config PCI_DOMAINS_GENERIC
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def_bool PCI
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config PCI_SYSCALL
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def_bool PCI
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source "drivers/pci/Kconfig"
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source "drivers/pci/pcie/Kconfig"
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source "drivers/pci/hotplug/Kconfig"
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endmenu
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menu "Kernel Features"
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menu "ARM errata workarounds via the alternatives framework"
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config ARM64_ERRATUM_826319
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bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is accepted"
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default y
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help
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This option adds an alternative code sequence to work around ARM
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erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
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AXI master interface and an L2 cache.
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If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
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and is unable to accept a certain write via this interface, it will
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not progress on read data presented on the read data channel and the
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system can deadlock.
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The workaround promotes data cache clean instructions to
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data cache clean-and-invalidate.
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Please note that this does not necessarily enable the workaround,
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as it depends on the alternative framework, which will only patch
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the kernel if an affected CPU is detected.
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If unsure, say Y.
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config ARM64_ERRATUM_827319
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bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect"
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default y
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help
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This option adds an alternative code sequence to work around ARM
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erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
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master interface and an L2 cache.
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Under certain conditions this erratum can cause a clean line eviction
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to occur at the same time as another transaction to the same address
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on the AMBA 5 CHI interface, which can cause data corruption if the
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interconnect reorders the two transactions.
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The workaround promotes data cache clean instructions to
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data cache clean-and-invalidate.
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Please note that this does not necessarily enable the workaround,
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as it depends on the alternative framework, which will only patch
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the kernel if an affected CPU is detected.
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If unsure, say Y.
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config ARM64_ERRATUM_824069
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bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop"
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default y
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help
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This option adds an alternative code sequence to work around ARM
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erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
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to a coherent interconnect.
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If a Cortex-A53 processor is executing a store or prefetch for
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write instruction at the same time as a processor in another
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cluster is executing a cache maintenance operation to the same
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address, then this erratum might cause a clean cache line to be
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incorrectly marked as dirty.
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The workaround promotes data cache clean instructions to
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data cache clean-and-invalidate.
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Please note that this option does not necessarily enable the
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workaround, as it depends on the alternative framework, which will
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only patch the kernel if an affected CPU is detected.
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If unsure, say Y.
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config ARM64_ERRATUM_819472
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bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
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default y
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help
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This option adds an alternative code sequence to work around ARM
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erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
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present when it is connected to a coherent interconnect.
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If the processor is executing a load and store exclusive sequence at
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the same time as a processor in another cluster is executing a cache
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maintenance operation to the same address, then this erratum might
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cause data corruption.
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The workaround promotes data cache clean instructions to
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data cache clean-and-invalidate.
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Please note that this does not necessarily enable the workaround,
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as it depends on the alternative framework, which will only patch
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the kernel if an affected CPU is detected.
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If unsure, say Y.
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config ARM64_ERRATUM_832075
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bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
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default y
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help
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This option adds an alternative code sequence to work around ARM
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erratum 832075 on Cortex-A57 parts up to r1p2.
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Affected Cortex-A57 parts might deadlock when exclusive load/store
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instructions to Write-Back memory are mixed with Device loads.
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The workaround is to promote device loads to use Load-Acquire
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semantics.
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Please note that this does not necessarily enable the workaround,
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as it depends on the alternative framework, which will only patch
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the kernel if an affected CPU is detected.
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If unsure, say Y.
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endmenu
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choice
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prompt "Page size"
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default ARM64_4K_PAGES
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help
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Page size (translation granule) configuration.
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config ARM64_4K_PAGES
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bool "4KB"
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help
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This feature enables 4KB pages support.
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config ARM64_64K_PAGES
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bool "64KB"
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help
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This feature enables 64KB pages support (4KB by default)
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allowing only two levels of page tables and faster TLB
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look-up. AArch32 emulation is not available when this feature
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is enabled.
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endchoice
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choice
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prompt "Virtual address space size"
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default ARM64_VA_BITS_39 if ARM64_4K_PAGES
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default ARM64_VA_BITS_42 if ARM64_64K_PAGES
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help
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Allows choosing one of multiple possible virtual address
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space sizes. The level of translation table is determined by
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a combination of page size and virtual address space size.
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config ARM64_VA_BITS_39
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bool "39-bit"
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depends on ARM64_4K_PAGES
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config ARM64_VA_BITS_42
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bool "42-bit"
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depends on ARM64_64K_PAGES
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config ARM64_VA_BITS_48
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bool "48-bit"
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depends on !ARM_SMMU
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endchoice
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config ARM64_VA_BITS
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int
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default 39 if ARM64_VA_BITS_39
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default 42 if ARM64_VA_BITS_42
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default 48 if ARM64_VA_BITS_48
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config ARM64_PGTABLE_LEVELS
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int
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default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
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default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
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default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
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default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
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config CPU_BIG_ENDIAN
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bool "Build big-endian kernel"
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help
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Say Y if you plan on running a kernel in big-endian mode.
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config SMP
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bool "Symmetric Multi-Processing"
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help
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This enables support for systems with more than one CPU. If
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you say N here, the kernel will run on single and
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multiprocessor machines, but will use only one CPU of a
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multiprocessor machine. If you say Y here, the kernel will run
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on many, but not all, single processor machines. On a single
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processor machine, the kernel will run faster if you say N
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here.
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If you don't know what to do here, say N.
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config SCHED_MC
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bool "Multi-core scheduler support"
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depends on SMP
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help
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Multi-core scheduler support improves the CPU scheduler's decision
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making when dealing with multi-core CPU chips at a cost of slightly
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increased overhead in some places. If unsure say N here.
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config SCHED_SMT
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bool "SMT scheduler support"
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depends on SMP
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help
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Improves the CPU scheduler's decision making when dealing with
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MultiThreading at a cost of slightly increased overhead in some
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places. If unsure say N here.
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config NR_CPUS
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int "Maximum number of CPUs (2-64)"
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range 2 64
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depends on SMP
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# These have to remain sorted largest to smallest
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default "64"
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config HOTPLUG_CPU
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bool "Support for hot-pluggable CPUs"
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depends on SMP
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help
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Say Y here to experiment with turning CPUs off and on. CPUs
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can be controlled through /sys/devices/system/cpu.
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source kernel/Kconfig.preempt
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config HZ
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int
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default 100
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config ARCH_HAS_HOLES_MEMORYMODEL
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def_bool y if SPARSEMEM
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config ARCH_SPARSEMEM_ENABLE
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def_bool y
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select SPARSEMEM_VMEMMAP_ENABLE
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config ARCH_SPARSEMEM_DEFAULT
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def_bool ARCH_SPARSEMEM_ENABLE
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config ARCH_SELECT_MEMORY_MODEL
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def_bool ARCH_SPARSEMEM_ENABLE
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config HAVE_ARCH_PFN_VALID
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def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
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config HW_PERF_EVENTS
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bool "Enable hardware performance counter support for perf events"
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depends on PERF_EVENTS
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default y
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help
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Enable hardware performance counter support for perf events. If
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disabled, perf events will use software events only.
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config SYS_SUPPORTS_HUGETLBFS
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def_bool y
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config ARCH_WANT_GENERAL_HUGETLB
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def_bool y
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config ARCH_WANT_HUGE_PMD_SHARE
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def_bool y if !ARM64_64K_PAGES
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config HAVE_ARCH_TRANSPARENT_HUGEPAGE
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def_bool y
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config ARCH_HAS_CACHE_LINE_SIZE
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def_bool y
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source "mm/Kconfig"
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config SECCOMP
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bool "Enable seccomp to safely compute untrusted bytecode"
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---help---
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This kernel feature is useful for number crunching applications
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that may need to compute untrusted bytecode during their
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execution. By using pipes or other transports made available to
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the process as file descriptors supporting the read/write
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syscalls, it's possible to isolate those applications in
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their own address space using seccomp. Once seccomp is
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enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
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and the task is only allowed to execute a few safe syscalls
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defined by each seccomp mode.
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config XEN_DOM0
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def_bool y
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depends on XEN
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config XEN
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bool "Xen guest support on ARM64"
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depends on ARM64 && OF
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select SWIOTLB_XEN
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help
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Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.
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config FORCE_MAX_ZONEORDER
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int
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default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
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default "11"
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menuconfig ARMV8_DEPRECATED
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bool "Emulate deprecated/obsolete ARMv8 instructions"
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depends on COMPAT
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help
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Legacy software support may require certain instructions
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that have been deprecated or obsoleted in the architecture.
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Enable this config to enable selective emulation of these
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features.
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If unsure, say Y
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if ARMV8_DEPRECATED
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config SWP_EMULATION
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bool "Emulate SWP/SWPB instructions"
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help
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ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
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they are always undefined. Say Y here to enable software
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emulation of these instructions for userspace using LDXR/STXR.
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In some older versions of glibc [<=2.8] SWP is used during futex
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trylock() operations with the assumption that the code will not
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be preempted. This invalid assumption may be more likely to fail
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with SWP emulation enabled, leading to deadlock of the user
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application.
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NOTE: when accessing uncached shared regions, LDXR/STXR rely
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on an external transaction monitoring block called a global
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monitor to maintain update atomicity. If your system does not
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implement a global monitor, this option can cause programs that
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perform SWP operations to uncached memory to deadlock.
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If unsure, say Y
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config CP15_BARRIER_EMULATION
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bool "Emulate CP15 Barrier instructions"
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help
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|
The CP15 barrier instructions - CP15ISB, CP15DSB, and
|
|
CP15DMB - are deprecated in ARMv8 (and ARMv7). It is
|
|
strongly recommended to use the ISB, DSB, and DMB
|
|
instructions instead.
|
|
|
|
Say Y here to enable software emulation of these
|
|
instructions for AArch32 userspace code. When this option is
|
|
enabled, CP15 barrier usage is traced which can help
|
|
identify software that needs updating.
|
|
|
|
If unsure, say Y
|
|
|
|
config SETEND_EMULATION
|
|
bool "Emulate SETEND instruction"
|
|
help
|
|
The SETEND instruction alters the data-endianness of the
|
|
AArch32 EL0, and is deprecated in ARMv8.
|
|
|
|
Say Y here to enable software emulation of the instruction
|
|
for AArch32 userspace code.
|
|
|
|
Note: All the cpus on the system must have mixed endian support at EL0
|
|
for this feature to be enabled. If a new CPU - which doesn't support mixed
|
|
endian - is hotplugged in after this feature has been enabled, there could
|
|
be unexpected results in the applications.
|
|
|
|
If unsure, say Y
|
|
endif
|
|
|
|
endmenu
|
|
|
|
menu "Boot options"
|
|
|
|
config CMDLINE
|
|
string "Default kernel command string"
|
|
default ""
|
|
help
|
|
Provide a set of default command-line options at build time by
|
|
entering them here. As a minimum, you should specify the the
|
|
root device (e.g. root=/dev/nfs).
|
|
|
|
config CMDLINE_FORCE
|
|
bool "Always use the default kernel command string"
|
|
help
|
|
Always use the default kernel command string, even if the boot
|
|
loader passes other arguments to the kernel.
|
|
This is useful if you cannot or don't want to change the
|
|
command-line options your boot loader passes to the kernel.
|
|
|
|
config EFI_STUB
|
|
bool
|
|
|
|
config EFI
|
|
bool "UEFI runtime support"
|
|
depends on OF && !CPU_BIG_ENDIAN
|
|
select LIBFDT
|
|
select UCS2_STRING
|
|
select EFI_PARAMS_FROM_FDT
|
|
select EFI_RUNTIME_WRAPPERS
|
|
select EFI_STUB
|
|
select EFI_ARMSTUB
|
|
default y
|
|
help
|
|
This option provides support for runtime services provided
|
|
by UEFI firmware (such as non-volatile variables, realtime
|
|
clock, and platform reset). A UEFI stub is also provided to
|
|
allow the kernel to be booted as an EFI application. This
|
|
is only useful on systems that have UEFI firmware.
|
|
|
|
config DMI
|
|
bool "Enable support for SMBIOS (DMI) tables"
|
|
depends on EFI
|
|
default y
|
|
help
|
|
This enables SMBIOS/DMI feature for systems.
|
|
|
|
This option is only useful on systems that have UEFI firmware.
|
|
However, even with this option, the resultant kernel should
|
|
continue to boot on existing non-UEFI platforms.
|
|
|
|
endmenu
|
|
|
|
menu "Userspace binary formats"
|
|
|
|
source "fs/Kconfig.binfmt"
|
|
|
|
config COMPAT
|
|
bool "Kernel support for 32-bit EL0"
|
|
depends on !ARM64_64K_PAGES
|
|
select COMPAT_BINFMT_ELF
|
|
select HAVE_UID16
|
|
select OLD_SIGSUSPEND3
|
|
select COMPAT_OLD_SIGACTION
|
|
help
|
|
This option enables support for a 32-bit EL0 running under a 64-bit
|
|
kernel at EL1. AArch32-specific components such as system calls,
|
|
the user helper functions, VFP support and the ptrace interface are
|
|
handled appropriately by the kernel.
|
|
|
|
If you want to execute 32-bit userspace applications, say Y.
|
|
|
|
config SYSVIPC_COMPAT
|
|
def_bool y
|
|
depends on COMPAT && SYSVIPC
|
|
|
|
endmenu
|
|
|
|
menu "Power management options"
|
|
|
|
source "kernel/power/Kconfig"
|
|
|
|
config ARCH_SUSPEND_POSSIBLE
|
|
def_bool y
|
|
|
|
config ARM64_CPU_SUSPEND
|
|
def_bool PM_SLEEP
|
|
|
|
endmenu
|
|
|
|
menu "CPU Power Management"
|
|
|
|
source "drivers/cpuidle/Kconfig"
|
|
|
|
source "drivers/cpufreq/Kconfig"
|
|
|
|
endmenu
|
|
|
|
source "net/Kconfig"
|
|
|
|
source "drivers/Kconfig"
|
|
|
|
source "drivers/firmware/Kconfig"
|
|
|
|
source "fs/Kconfig"
|
|
|
|
source "arch/arm64/kvm/Kconfig"
|
|
|
|
source "arch/arm64/Kconfig.debug"
|
|
|
|
source "security/Kconfig"
|
|
|
|
source "crypto/Kconfig"
|
|
if CRYPTO
|
|
source "arch/arm64/crypto/Kconfig"
|
|
endif
|
|
|
|
source "lib/Kconfig"
|