4fc06b3171
dct_base and dct_limit obtain 32 bit register values when they read their respective pci config space registers. A left shift beyond 32 bits will cause them to wrap around. Similar case for chan_addr as can be seen from the bug report (link below). In the patch, we rectify this by casting chan_addr to u64 and by comparing dct_base and dct_limit against properly shifted sys_addr in order to compare the correct bits. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> Link: http://lkml.kernel.org/r/20130819132302.GA12171@elgon.mountain Signed-off-by: Borislav Petkov <bp@suse.de> |
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.. | ||
Kconfig | ||
Makefile | ||
amd64_edac.c | ||
amd64_edac.h | ||
amd64_edac_dbg.c | ||
amd64_edac_inj.c | ||
amd76x_edac.c | ||
amd8111_edac.c | ||
amd8111_edac.h | ||
amd8131_edac.c | ||
amd8131_edac.h | ||
cell_edac.c | ||
cpc925_edac.c | ||
e7xxx_edac.c | ||
e752x_edac.c | ||
edac_core.h | ||
edac_device.c | ||
edac_device_sysfs.c | ||
edac_mc.c | ||
edac_mc_sysfs.c | ||
edac_module.c | ||
edac_module.h | ||
edac_pci.c | ||
edac_pci_sysfs.c | ||
edac_stub.c | ||
ghes_edac.c | ||
highbank_l2_edac.c | ||
highbank_mc_edac.c | ||
i7core_edac.c | ||
i3000_edac.c | ||
i3200_edac.c | ||
i5000_edac.c | ||
i5100_edac.c | ||
i5400_edac.c | ||
i7300_edac.c | ||
i82443bxgx_edac.c | ||
i82860_edac.c | ||
i82875p_edac.c | ||
i82975x_edac.c | ||
mce_amd.c | ||
mce_amd.h | ||
mce_amd_inj.c | ||
mpc85xx_edac.c | ||
mpc85xx_edac.h | ||
mv64x60_edac.c | ||
mv64x60_edac.h | ||
octeon_edac-l2c.c | ||
octeon_edac-lmc.c | ||
octeon_edac-pc.c | ||
octeon_edac-pci.c | ||
pasemi_edac.c | ||
ppc4xx_edac.c | ||
ppc4xx_edac.h | ||
r82600_edac.c | ||
sb_edac.c | ||
tile_edac.c | ||
x38_edac.c |