In order to mark I2C transfer fail when MEN bit in I2C controller is
reset unexpectedly in MCOMP interrupt, interrupt status bits XMTSERV or
RCVSERV should be checked.
Master Transfer Complete (MCOMP).
[1] The initiated master transfer has completed. In the absence of a
repeat start, the bus has been released.
[0] The completion of a transfer has not been detected.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
[wsa: fixed spaces around operators and typo in commit message]
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2ee74eb95c