8ca302e9c6
SoC platform changes (arch/arm/mach-*). This merge window, the bulk is
for a few platforms:
- Andres Färber adds initial support for the Actions Semi S500 (a.k.a.
'owl') platform, a close relative of the S900 platform he adds for arm64.
- in mach-omap2, we remove more legacy code
- Rockchips gains support for the RV1108 SoC designed for camera
applications.
- For Atmel, we gain support for MMU-less SoCs (SAME70/V71/S70/V70)
- Minor updates for other platforms, including davinci, s3c64xx,
prima2, stm32, broadcom nsp, amlogic, pxa, imx and renesas
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAWVo7+GCrR//JCVInAQKbMA//WeEPEDUt0boJCUfuzXfZ35S5ksBMBGQa
NaOJvcW3T//7Tfa88YlBEB7h1w22u1Sv4/CfcistdSPbUwZLyYo6aUz53AwlUnLs
bVHnd8+h1xN6qSDjzOPIEQQHg9OVIRBD49moBgJ1BkXzyqR/RI1jPPyyRl5vucSW
MYRxhPkplmjFL5+6uvFoSOdd3Z/FLoEYRrkIk4iu+KgKtnNlj4P1FNSdm6Yb29dj
yzmXoSpxEzbq0ahGlkjrekEJxTWvW1vOq9d+xTKwTbXoM7pbzXnBRzx4q2Fg9GAT
BJseMx+uDEG/+eYrFZA7jX/HgpKB1fAlCGp+dK6GIcJoEM6lFKJRsJrP702KPzg0
PqOMM/htq/4hZ7Waz+Yj3lyVF2C+A6Dn/fXPaHJGdTLj4r0OLgZayhBXFHp1VX2G
9ERx1UCnfxeY91VBUM99qo21ECT7j0C/bZLln8MFjwX8tk3OATkElIAtnsEHxJ5d
v4TEkI/AcpMW4lMj/u/hp1PJMCvhlSreWPGx1PRax6va+YB5Ov19DshVgyfoTTq9
kArUJWQdKo4aKqB+feg9NHNC01xSLw5ywKb+oIyYP3jZzMexzRyP5L7EAVOu6Cel
iHeIRpo8VjX63gltE+9u4aZ/aEMREGVcgkzuwBTKqbVQ3ismrmGYe54VnFAushJS
m+XSB250Vz8=
=8F3w
-----END PGP SIGNATURE-----
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Arnd Bergmann:
"SoC platform changes (arch/arm/mach-*). This merge window, the bulk is
for a few platforms:
- Andres Färber adds initial support for the Actions Semi S500 (aka
'owl') platform, a close relative of the S900 platform he adds for
arm64.
- in mach-omap2, we remove more legacy code
- Rockchips gains support for the RV1108 SoC designed for camera
applications.
- For Atmel, we gain support for MMU-less SoCs (SAME70/V71/S70/V70)
- Minor updates for other platforms, including davinci, s3c64xx,
prima2, stm32, broadcom nsp, amlogic, pxa, imx and renesas"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (74 commits)
ARM: owl: smp: Drop bogus holding pen
ARM: owl: Drop custom machine
ARM: owl: smp: Implement SPS power-gating for CPU2 and CPU3
soc: actions: owl-sps: Factor out owl_sps_set_pg() for power-gating
soc: actions: Add Owl SPS
dt-bindings: power: Add Owl SPS power domains
MAINTAINERS: Update Actions Semi section with SPS
ARM: owl: Implement CPU enable-method for S500
MAINTAINERS: Add Actions Semi Owl section
ARM: Prepare Actions Semi S500
ARM: socfpga: Increase max number of GPIOs
ARM: stm32: Introduce MACH_STM32F469 flag
ARM: prima2: remove redundant select CPU_V7
ARM: davinci: fix const warnings
ARM: shmobile: pm-rmobile: Use GENPD_FLAG_ALWAYS_ON
ARM: OMAP4: hwmod_data: add SHAM crypto accelerator
ARM: OMAP4: hwmod data: add des
ARM: OMAP4: hwmod data: add aes2
ARM: OMAP4: hwmod data: add aes1
ARM: pxa: Delete an error message for a failed memory allocation in pxa3xx_u2d_probe()
...
84 lines
2.1 KiB
C
84 lines
2.1 KiB
C
/*
|
|
* Device Tree support for Rockchip SoCs
|
|
*
|
|
* Copyright (c) 2013 MundoReader S.L.
|
|
* Author: Heiko Stuebner <heiko@sntech.de>
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License as published by
|
|
* the Free Software Foundation; either version 2 of the License, or
|
|
* (at your option) any later version.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*/
|
|
|
|
#include <linux/kernel.h>
|
|
#include <linux/init.h>
|
|
#include <linux/of_platform.h>
|
|
#include <linux/irqchip.h>
|
|
#include <linux/clk-provider.h>
|
|
#include <linux/clocksource.h>
|
|
#include <linux/mfd/syscon.h>
|
|
#include <linux/regmap.h>
|
|
#include <asm/mach/arch.h>
|
|
#include <asm/mach/map.h>
|
|
#include <asm/hardware/cache-l2x0.h>
|
|
#include "core.h"
|
|
#include "pm.h"
|
|
|
|
#define RK3288_TIMER6_7_PHYS 0xff810000
|
|
|
|
static void __init rockchip_timer_init(void)
|
|
{
|
|
if (of_machine_is_compatible("rockchip,rk3288")) {
|
|
void __iomem *reg_base;
|
|
|
|
/*
|
|
* Most/all uboot versions for rk3288 don't enable timer7
|
|
* which is needed for the architected timer to work.
|
|
* So make sure it is running during early boot.
|
|
*/
|
|
reg_base = ioremap(RK3288_TIMER6_7_PHYS, SZ_16K);
|
|
if (reg_base) {
|
|
writel(0, reg_base + 0x30);
|
|
writel(0xffffffff, reg_base + 0x20);
|
|
writel(0xffffffff, reg_base + 0x24);
|
|
writel(1, reg_base + 0x30);
|
|
dsb();
|
|
iounmap(reg_base);
|
|
} else {
|
|
pr_err("rockchip: could not map timer7 registers\n");
|
|
}
|
|
}
|
|
|
|
of_clk_init(NULL);
|
|
timer_probe();
|
|
}
|
|
|
|
static void __init rockchip_dt_init(void)
|
|
{
|
|
rockchip_suspend_init();
|
|
}
|
|
|
|
static const char * const rockchip_board_dt_compat[] = {
|
|
"rockchip,rk2928",
|
|
"rockchip,rk3066a",
|
|
"rockchip,rk3066b",
|
|
"rockchip,rk3188",
|
|
"rockchip,rk3228",
|
|
"rockchip,rk3288",
|
|
"rockchip,rv1108",
|
|
NULL,
|
|
};
|
|
|
|
DT_MACHINE_START(ROCKCHIP_DT, "Rockchip (Device Tree)")
|
|
.l2c_aux_val = 0,
|
|
.l2c_aux_mask = ~0,
|
|
.init_time = rockchip_timer_init,
|
|
.dt_compat = rockchip_board_dt_compat,
|
|
.init_machine = rockchip_dt_init,
|
|
MACHINE_END
|