aef03d3fa5
Include the linux/host1x.h and dev.h headers so that function prototypes are visible to keep sparse from suggesting that their implementations be made static. Signed-off-by: Thierry Reding <treding@nvidia.com>
276 lines
6.8 KiB
C
276 lines
6.8 KiB
C
/*
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* Copyright (C) 2013 NVIDIA Corporation
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*
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* Permission to use, copy, modify, distribute, and sell this software and its
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* documentation for any purpose is hereby granted without fee, provided that
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* the above copyright notice appear in all copies and that both that copyright
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* notice and this permission notice appear in supporting documentation, and
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* that the name of the copyright holders not be used in advertising or
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* publicity pertaining to distribution of the software without specific,
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* written prior permission. The copyright holders make no representations
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* about the suitability of this software for any purpose. It is provided "as
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* is" without express or implied warranty.
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*
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* THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
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* EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
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* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
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* OF THIS SOFTWARE.
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/host1x.h>
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#include <linux/io.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include "dev.h"
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#define MIPI_CAL_CTRL 0x00
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#define MIPI_CAL_CTRL_START (1 << 0)
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#define MIPI_CAL_AUTOCAL_CTRL 0x01
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#define MIPI_CAL_STATUS 0x02
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#define MIPI_CAL_STATUS_DONE (1 << 16)
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#define MIPI_CAL_STATUS_ACTIVE (1 << 0)
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#define MIPI_CAL_CONFIG_CSIA 0x05
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#define MIPI_CAL_CONFIG_CSIB 0x06
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#define MIPI_CAL_CONFIG_CSIC 0x07
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#define MIPI_CAL_CONFIG_CSID 0x08
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#define MIPI_CAL_CONFIG_CSIE 0x09
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#define MIPI_CAL_CONFIG_DSIA 0x0e
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#define MIPI_CAL_CONFIG_DSIB 0x0f
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#define MIPI_CAL_CONFIG_DSIC 0x10
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#define MIPI_CAL_CONFIG_DSID 0x11
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#define MIPI_CAL_CONFIG_SELECT (1 << 21)
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#define MIPI_CAL_CONFIG_HSPDOS(x) (((x) & 0x1f) << 16)
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#define MIPI_CAL_CONFIG_HSPUOS(x) (((x) & 0x1f) << 8)
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#define MIPI_CAL_CONFIG_TERMOS(x) (((x) & 0x1f) << 0)
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#define MIPI_CAL_BIAS_PAD_CFG0 0x16
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#define MIPI_CAL_BIAS_PAD_PDVCLAMP (1 << 1)
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#define MIPI_CAL_BIAS_PAD_E_VCLAMP_REF (1 << 0)
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#define MIPI_CAL_BIAS_PAD_CFG1 0x17
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#define MIPI_CAL_BIAS_PAD_CFG2 0x18
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#define MIPI_CAL_BIAS_PAD_PDVREG (1 << 1)
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static const struct module {
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unsigned long reg;
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} modules[] = {
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{ .reg = MIPI_CAL_CONFIG_CSIA },
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{ .reg = MIPI_CAL_CONFIG_CSIB },
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{ .reg = MIPI_CAL_CONFIG_CSIC },
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{ .reg = MIPI_CAL_CONFIG_CSID },
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{ .reg = MIPI_CAL_CONFIG_CSIE },
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{ .reg = MIPI_CAL_CONFIG_DSIA },
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{ .reg = MIPI_CAL_CONFIG_DSIB },
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{ .reg = MIPI_CAL_CONFIG_DSIC },
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{ .reg = MIPI_CAL_CONFIG_DSID },
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};
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struct tegra_mipi {
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void __iomem *regs;
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struct mutex lock;
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struct clk *clk;
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};
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struct tegra_mipi_device {
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struct platform_device *pdev;
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struct tegra_mipi *mipi;
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struct device *device;
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unsigned long pads;
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};
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static inline unsigned long tegra_mipi_readl(struct tegra_mipi *mipi,
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unsigned long reg)
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{
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return readl(mipi->regs + (reg << 2));
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}
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static inline void tegra_mipi_writel(struct tegra_mipi *mipi,
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unsigned long value, unsigned long reg)
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{
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writel(value, mipi->regs + (reg << 2));
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}
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struct tegra_mipi_device *tegra_mipi_request(struct device *device)
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{
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struct device_node *np = device->of_node;
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struct tegra_mipi_device *dev;
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struct of_phandle_args args;
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int err;
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err = of_parse_phandle_with_args(np, "nvidia,mipi-calibrate",
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"#nvidia,mipi-calibrate-cells", 0,
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&args);
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if (err < 0)
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return ERR_PTR(err);
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dev = kzalloc(sizeof(*dev), GFP_KERNEL);
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if (!dev) {
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of_node_put(args.np);
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err = -ENOMEM;
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goto out;
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}
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dev->pdev = of_find_device_by_node(args.np);
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if (!dev->pdev) {
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of_node_put(args.np);
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err = -ENODEV;
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goto free;
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}
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of_node_put(args.np);
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dev->mipi = platform_get_drvdata(dev->pdev);
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if (!dev->mipi) {
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err = -EPROBE_DEFER;
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goto pdev_put;
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}
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dev->pads = args.args[0];
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dev->device = device;
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return dev;
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pdev_put:
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platform_device_put(dev->pdev);
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free:
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kfree(dev);
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out:
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return ERR_PTR(err);
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}
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EXPORT_SYMBOL(tegra_mipi_request);
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void tegra_mipi_free(struct tegra_mipi_device *device)
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{
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platform_device_put(device->pdev);
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kfree(device);
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}
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EXPORT_SYMBOL(tegra_mipi_free);
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static int tegra_mipi_wait(struct tegra_mipi *mipi)
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{
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unsigned long timeout = jiffies + msecs_to_jiffies(250);
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unsigned long value;
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while (time_before(jiffies, timeout)) {
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value = tegra_mipi_readl(mipi, MIPI_CAL_STATUS);
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if ((value & MIPI_CAL_STATUS_ACTIVE) == 0 &&
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(value & MIPI_CAL_STATUS_DONE) != 0)
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return 0;
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usleep_range(10, 50);
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}
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return -ETIMEDOUT;
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}
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int tegra_mipi_calibrate(struct tegra_mipi_device *device)
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{
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unsigned long value;
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unsigned int i;
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int err;
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err = clk_enable(device->mipi->clk);
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if (err < 0)
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return err;
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mutex_lock(&device->mipi->lock);
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value = tegra_mipi_readl(device->mipi, MIPI_CAL_BIAS_PAD_CFG0);
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value &= ~MIPI_CAL_BIAS_PAD_PDVCLAMP;
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value |= MIPI_CAL_BIAS_PAD_E_VCLAMP_REF;
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tegra_mipi_writel(device->mipi, value, MIPI_CAL_BIAS_PAD_CFG0);
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value = tegra_mipi_readl(device->mipi, MIPI_CAL_BIAS_PAD_CFG2);
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value &= ~MIPI_CAL_BIAS_PAD_PDVREG;
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tegra_mipi_writel(device->mipi, value, MIPI_CAL_BIAS_PAD_CFG2);
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for (i = 0; i < ARRAY_SIZE(modules); i++) {
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if (device->pads & BIT(i))
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value = MIPI_CAL_CONFIG_SELECT |
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MIPI_CAL_CONFIG_HSPDOS(0) |
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MIPI_CAL_CONFIG_HSPUOS(4) |
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MIPI_CAL_CONFIG_TERMOS(5);
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else
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value = 0;
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tegra_mipi_writel(device->mipi, value, modules[i].reg);
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}
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tegra_mipi_writel(device->mipi, MIPI_CAL_CTRL_START, MIPI_CAL_CTRL);
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err = tegra_mipi_wait(device->mipi);
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mutex_unlock(&device->mipi->lock);
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clk_disable(device->mipi->clk);
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return err;
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}
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EXPORT_SYMBOL(tegra_mipi_calibrate);
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static int tegra_mipi_probe(struct platform_device *pdev)
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{
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struct tegra_mipi *mipi;
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struct resource *res;
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int err;
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mipi = devm_kzalloc(&pdev->dev, sizeof(*mipi), GFP_KERNEL);
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if (!mipi)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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mipi->regs = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(mipi->regs))
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return PTR_ERR(mipi->regs);
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mutex_init(&mipi->lock);
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mipi->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(mipi->clk)) {
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dev_err(&pdev->dev, "failed to get clock\n");
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return PTR_ERR(mipi->clk);
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}
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err = clk_prepare(mipi->clk);
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if (err < 0)
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return err;
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platform_set_drvdata(pdev, mipi);
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return 0;
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}
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static int tegra_mipi_remove(struct platform_device *pdev)
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{
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struct tegra_mipi *mipi = platform_get_drvdata(pdev);
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clk_unprepare(mipi->clk);
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return 0;
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}
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static struct of_device_id tegra_mipi_of_match[] = {
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{ .compatible = "nvidia,tegra114-mipi", },
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{ },
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};
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struct platform_driver tegra_mipi_driver = {
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.driver = {
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.name = "tegra-mipi",
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.of_match_table = tegra_mipi_of_match,
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},
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.probe = tegra_mipi_probe,
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.remove = tegra_mipi_remove,
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};
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