226 lines
5.4 KiB
C
226 lines
5.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* k8temp.c - Linux kernel module for hardware monitoring
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*
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* Copyright (C) 2006 Rudolf Marek <r.marek@assembler.cz>
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*
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* Inspired from the w83785 and amd756 drivers.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/pci.h>
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#include <linux/hwmon.h>
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#include <linux/err.h>
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#include <linux/mutex.h>
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#include <asm/processor.h>
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#define TEMP_FROM_REG(val) (((((val) >> 16) & 0xff) - 49) * 1000)
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#define REG_TEMP 0xe4
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#define SEL_PLACE 0x40
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#define SEL_CORE 0x04
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struct k8temp_data {
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struct mutex update_lock;
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/* registers values */
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u8 sensorsp; /* sensor presence bits - SEL_CORE, SEL_PLACE */
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u8 swap_core_select; /* meaning of SEL_CORE is inverted */
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u32 temp_offset;
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};
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static const struct pci_device_id k8temp_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MISC) },
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{ 0 },
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};
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MODULE_DEVICE_TABLE(pci, k8temp_ids);
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static int is_rev_g_desktop(u8 model)
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{
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u32 brandidx;
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if (model < 0x69)
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return 0;
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if (model == 0xc1 || model == 0x6c || model == 0x7c)
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return 0;
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/*
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* Differentiate between AM2 and ASB1.
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* See "Constructing the processor Name String" in "Revision
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* Guide for AMD NPT Family 0Fh Processors" (33610).
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*/
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brandidx = cpuid_ebx(0x80000001);
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brandidx = (brandidx >> 9) & 0x1f;
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/* Single core */
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if ((model == 0x6f || model == 0x7f) &&
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(brandidx == 0x7 || brandidx == 0x9 || brandidx == 0xc))
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return 0;
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/* Dual core */
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if (model == 0x6b &&
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(brandidx == 0xb || brandidx == 0xc))
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return 0;
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return 1;
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}
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static umode_t
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k8temp_is_visible(const void *drvdata, enum hwmon_sensor_types type,
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u32 attr, int channel)
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{
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const struct k8temp_data *data = drvdata;
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if ((channel & 1) && !(data->sensorsp & SEL_PLACE))
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return 0;
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if ((channel & 2) && !(data->sensorsp & SEL_CORE))
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return 0;
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return 0444;
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}
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static int
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k8temp_read(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long *val)
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{
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struct k8temp_data *data = dev_get_drvdata(dev);
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struct pci_dev *pdev = to_pci_dev(dev->parent);
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int core, place;
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u32 temp;
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u8 tmp;
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core = (channel >> 1) & 1;
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place = channel & 1;
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core ^= data->swap_core_select;
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mutex_lock(&data->update_lock);
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pci_read_config_byte(pdev, REG_TEMP, &tmp);
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tmp &= ~(SEL_PLACE | SEL_CORE);
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if (core)
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tmp |= SEL_CORE;
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if (place)
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tmp |= SEL_PLACE;
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pci_write_config_byte(pdev, REG_TEMP, tmp);
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pci_read_config_dword(pdev, REG_TEMP, &temp);
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mutex_unlock(&data->update_lock);
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*val = TEMP_FROM_REG(temp) + data->temp_offset;
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return 0;
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}
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static const struct hwmon_ops k8temp_ops = {
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.is_visible = k8temp_is_visible,
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.read = k8temp_read,
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};
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static const struct hwmon_channel_info *k8temp_info[] = {
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HWMON_CHANNEL_INFO(temp,
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HWMON_T_INPUT, HWMON_T_INPUT, HWMON_T_INPUT, HWMON_T_INPUT),
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NULL
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};
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static const struct hwmon_chip_info k8temp_chip_info = {
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.ops = &k8temp_ops,
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.info = k8temp_info,
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};
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static int k8temp_probe(struct pci_dev *pdev,
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const struct pci_device_id *id)
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{
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u8 scfg;
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u32 temp;
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u8 model, stepping;
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struct k8temp_data *data;
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struct device *hwmon_dev;
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data = devm_kzalloc(&pdev->dev, sizeof(struct k8temp_data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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model = boot_cpu_data.x86_model;
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stepping = boot_cpu_data.x86_stepping;
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/* feature available since SH-C0, exclude older revisions */
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if ((model == 4 && stepping == 0) ||
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(model == 5 && stepping <= 1))
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return -ENODEV;
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/*
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* AMD NPT family 0fh, i.e. RevF and RevG:
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* meaning of SEL_CORE bit is inverted
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*/
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if (model >= 0x40) {
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data->swap_core_select = 1;
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dev_warn(&pdev->dev,
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"Temperature readouts might be wrong - check erratum #141\n");
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}
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/*
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* RevG desktop CPUs (i.e. no socket S1G1 or ASB1 parts) need
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* additional offset, otherwise reported temperature is below
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* ambient temperature
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*/
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if (is_rev_g_desktop(model))
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data->temp_offset = 21000;
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pci_read_config_byte(pdev, REG_TEMP, &scfg);
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scfg &= ~(SEL_PLACE | SEL_CORE); /* Select sensor 0, core0 */
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pci_write_config_byte(pdev, REG_TEMP, scfg);
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pci_read_config_byte(pdev, REG_TEMP, &scfg);
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if (scfg & (SEL_PLACE | SEL_CORE)) {
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dev_err(&pdev->dev, "Configuration bit(s) stuck at 1!\n");
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return -ENODEV;
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}
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scfg |= (SEL_PLACE | SEL_CORE);
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pci_write_config_byte(pdev, REG_TEMP, scfg);
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/* now we know if we can change core and/or sensor */
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pci_read_config_byte(pdev, REG_TEMP, &data->sensorsp);
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if (data->sensorsp & SEL_PLACE) {
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scfg &= ~SEL_CORE; /* Select sensor 1, core0 */
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pci_write_config_byte(pdev, REG_TEMP, scfg);
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pci_read_config_dword(pdev, REG_TEMP, &temp);
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scfg |= SEL_CORE; /* prepare for next selection */
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if (!((temp >> 16) & 0xff)) /* if temp is 0 -49C is unlikely */
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data->sensorsp &= ~SEL_PLACE;
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}
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if (data->sensorsp & SEL_CORE) {
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scfg &= ~SEL_PLACE; /* Select sensor 0, core1 */
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pci_write_config_byte(pdev, REG_TEMP, scfg);
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pci_read_config_dword(pdev, REG_TEMP, &temp);
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if (!((temp >> 16) & 0xff)) /* if temp is 0 -49C is unlikely */
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data->sensorsp &= ~SEL_CORE;
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}
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mutex_init(&data->update_lock);
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hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev,
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"k8temp",
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data,
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&k8temp_chip_info,
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NULL);
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return PTR_ERR_OR_ZERO(hwmon_dev);
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}
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static struct pci_driver k8temp_driver = {
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.name = "k8temp",
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.id_table = k8temp_ids,
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.probe = k8temp_probe,
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};
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module_pci_driver(k8temp_driver);
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MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
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MODULE_DESCRIPTION("AMD K8 core temperature monitor");
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MODULE_LICENSE("GPL");
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