fb11137af8
This splits the PHY allocation from the PHY init. This is needed in order to properly support Analog handling. Signed-off-by: Michael Buesch <mb@bu3sch.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
210 lines
7.0 KiB
C
210 lines
7.0 KiB
C
#ifndef LINUX_B43_PHY_G_H_
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#define LINUX_B43_PHY_G_H_
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/* OFDM PHY registers are defined in the A-PHY header. */
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#include "phy_a.h"
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/* CCK (B) PHY Registers */
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#define B43_PHY_VERSION_CCK B43_PHY_CCK(0x00) /* Versioning register for B-PHY */
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#define B43_PHY_CCKBBANDCFG B43_PHY_CCK(0x01) /* Contains antenna 0/1 control bit */
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#define B43_PHY_PGACTL B43_PHY_CCK(0x15) /* PGA control */
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#define B43_PHY_PGACTL_LPF 0x1000 /* Low pass filter (?) */
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#define B43_PHY_PGACTL_LOWBANDW 0x0040 /* Low bandwidth flag */
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#define B43_PHY_PGACTL_UNKNOWN 0xEFA0
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#define B43_PHY_FBCTL1 B43_PHY_CCK(0x18) /* Frequency bandwidth control 1 */
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#define B43_PHY_ITSSI B43_PHY_CCK(0x29) /* Idle TSSI */
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#define B43_PHY_LO_LEAKAGE B43_PHY_CCK(0x2D) /* Measured LO leakage */
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#define B43_PHY_ENERGY B43_PHY_CCK(0x33) /* Energy */
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#define B43_PHY_SYNCCTL B43_PHY_CCK(0x35)
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#define B43_PHY_FBCTL2 B43_PHY_CCK(0x38) /* Frequency bandwidth control 2 */
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#define B43_PHY_DACCTL B43_PHY_CCK(0x60) /* DAC control */
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#define B43_PHY_RCCALOVER B43_PHY_CCK(0x78) /* RC calibration override */
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/* Extended G-PHY Registers */
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#define B43_PHY_CLASSCTL B43_PHY_EXTG(0x02) /* Classify control */
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#define B43_PHY_GTABCTL B43_PHY_EXTG(0x03) /* G-PHY table control (see below) */
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#define B43_PHY_GTABOFF 0x03FF /* G-PHY table offset (see below) */
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#define B43_PHY_GTABNR 0xFC00 /* G-PHY table number (see below) */
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#define B43_PHY_GTABNR_SHIFT 10
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#define B43_PHY_GTABDATA B43_PHY_EXTG(0x04) /* G-PHY table data */
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#define B43_PHY_LO_MASK B43_PHY_EXTG(0x0F) /* Local Oscillator control mask */
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#define B43_PHY_LO_CTL B43_PHY_EXTG(0x10) /* Local Oscillator control */
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#define B43_PHY_RFOVER B43_PHY_EXTG(0x11) /* RF override */
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#define B43_PHY_RFOVERVAL B43_PHY_EXTG(0x12) /* RF override value */
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#define B43_PHY_RFOVERVAL_EXTLNA 0x8000
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#define B43_PHY_RFOVERVAL_LNA 0x7000
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#define B43_PHY_RFOVERVAL_LNA_SHIFT 12
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#define B43_PHY_RFOVERVAL_PGA 0x0F00
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#define B43_PHY_RFOVERVAL_PGA_SHIFT 8
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#define B43_PHY_RFOVERVAL_UNK 0x0010 /* Unknown, always set. */
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#define B43_PHY_RFOVERVAL_TRSWRX 0x00E0
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#define B43_PHY_RFOVERVAL_BW 0x0003 /* Bandwidth flags */
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#define B43_PHY_RFOVERVAL_BW_LPF 0x0001 /* Low Pass Filter */
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#define B43_PHY_RFOVERVAL_BW_LBW 0x0002 /* Low Bandwidth (when set), high when unset */
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#define B43_PHY_ANALOGOVER B43_PHY_EXTG(0x14) /* Analog override */
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#define B43_PHY_ANALOGOVERVAL B43_PHY_EXTG(0x15) /* Analog override value */
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/*** G-PHY table numbers */
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#define B43_GTAB(number, offset) (((number) << B43_PHY_GTABNR_SHIFT) | (offset))
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#define B43_GTAB_NRSSI B43_GTAB(0x00, 0)
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#define B43_GTAB_TRFEMW B43_GTAB(0x0C, 0x120)
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#define B43_GTAB_ORIGTR B43_GTAB(0x2E, 0x298)
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u16 b43_gtab_read(struct b43_wldev *dev, u16 table, u16 offset);
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void b43_gtab_write(struct b43_wldev *dev, u16 table, u16 offset, u16 value);
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/* Returns the boolean whether "TX Magnification" is enabled. */
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#define has_tx_magnification(phy) \
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(((phy)->rev >= 2) && \
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((phy)->radio_ver == 0x2050) && \
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((phy)->radio_rev == 8))
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/* Card uses the loopback gain stuff */
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#define has_loopback_gain(phy) \
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(((phy)->rev > 1) || ((phy)->gmode))
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/* Radio Attenuation (RF Attenuation) */
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struct b43_rfatt {
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u8 att; /* Attenuation value */
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bool with_padmix; /* Flag, PAD Mixer enabled. */
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};
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struct b43_rfatt_list {
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/* Attenuation values list */
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const struct b43_rfatt *list;
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u8 len;
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/* Minimum/Maximum attenuation values */
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u8 min_val;
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u8 max_val;
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};
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/* Returns true, if the values are the same. */
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static inline bool b43_compare_rfatt(const struct b43_rfatt *a,
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const struct b43_rfatt *b)
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{
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return ((a->att == b->att) &&
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(a->with_padmix == b->with_padmix));
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}
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/* Baseband Attenuation */
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struct b43_bbatt {
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u8 att; /* Attenuation value */
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};
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struct b43_bbatt_list {
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/* Attenuation values list */
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const struct b43_bbatt *list;
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u8 len;
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/* Minimum/Maximum attenuation values */
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u8 min_val;
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u8 max_val;
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};
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/* Returns true, if the values are the same. */
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static inline bool b43_compare_bbatt(const struct b43_bbatt *a,
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const struct b43_bbatt *b)
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{
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return (a->att == b->att);
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}
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/* tx_control bits. */
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#define B43_TXCTL_PA3DB 0x40 /* PA Gain 3dB */
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#define B43_TXCTL_PA2DB 0x20 /* PA Gain 2dB */
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#define B43_TXCTL_TXMIX 0x10 /* TX Mixer Gain */
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struct b43_txpower_lo_control;
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struct b43_phy_g {
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/* ACI (adjacent channel interference) flags. */
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bool aci_enable;
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bool aci_wlan_automatic;
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bool aci_hw_rssi;
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/* Radio switched on/off */
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bool radio_on;
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struct {
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/* Values saved when turning the radio off.
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* They are needed when turning it on again. */
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bool valid;
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u16 rfover;
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u16 rfoverval;
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} radio_off_context;
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u16 minlowsig[2];
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u16 minlowsigpos[2];
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/* Pointer to the table used to convert a
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* TSSI value to dBm-Q5.2 */
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const s8 *tssi2dbm;
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/* tssi2dbm is kmalloc()ed. Only used for free()ing. */
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bool dyn_tssi_tbl;
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/* Target idle TSSI */
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int tgt_idle_tssi;
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/* Current idle TSSI */
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int cur_idle_tssi;
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/* The current average TSSI.
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* Needs irq_lock, as it's updated in the IRQ path. */
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u8 average_tssi;
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/* Current TX power level attenuation control values */
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struct b43_bbatt bbatt;
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struct b43_rfatt rfatt;
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u8 tx_control; /* B43_TXCTL_XXX */
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/* The calculated attenuation deltas that are used later
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* when adjusting the actual power output. */
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int bbatt_delta;
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int rfatt_delta;
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/* LocalOscillator control values. */
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struct b43_txpower_lo_control *lo_control;
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/* Values from b43_calc_loopback_gain() */
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s16 max_lb_gain; /* Maximum Loopback gain in hdB */
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s16 trsw_rx_gain; /* TRSW RX gain in hdB */
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s16 lna_lod_gain; /* LNA lod */
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s16 lna_gain; /* LNA */
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s16 pga_gain; /* PGA */
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/* Current Interference Mitigation mode */
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int interfmode;
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/* Stack of saved values from the Interference Mitigation code.
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* Each value in the stack is layed out as follows:
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* bit 0-11: offset
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* bit 12-15: register ID
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* bit 16-32: value
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* register ID is: 0x1 PHY, 0x2 Radio, 0x3 ILT
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*/
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#define B43_INTERFSTACK_SIZE 26
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u32 interfstack[B43_INTERFSTACK_SIZE]; //FIXME: use a data structure
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/* Saved values from the NRSSI Slope calculation */
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s16 nrssi[2];
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s32 nrssislope;
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/* In memory nrssi lookup table. */
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s8 nrssi_lt[64];
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u16 lofcal;
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u16 initval; //FIXME rename?
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/* The device does address auto increment for the OFDM tables.
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* We cache the previously used address here and omit the address
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* write on the next table access, if possible. */
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u16 ofdmtab_addr; /* The address currently set in hardware. */
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enum { /* The last data flow direction. */
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B43_OFDMTAB_DIRECTION_UNKNOWN = 0,
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B43_OFDMTAB_DIRECTION_READ,
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B43_OFDMTAB_DIRECTION_WRITE,
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} ofdmtab_addr_direction;
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};
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void b43_gphy_set_baseband_attenuation(struct b43_wldev *dev,
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u16 baseband_attenuation);
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void b43_gphy_channel_switch(struct b43_wldev *dev,
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unsigned int channel,
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bool synthetic_pu_workaround);
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u8 * b43_generate_dyn_tssi2dbm_tab(struct b43_wldev *dev,
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s16 pab0, s16 pab1, s16 pab2);
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struct b43_phy_operations;
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extern const struct b43_phy_operations b43_phyops_g;
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#endif /* LINUX_B43_PHY_G_H_ */
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