dccfd1e439
Device tree and bindings updates for 3.12. General additions of various on-chip and on-board peripherals on various platforms as support gets added. Some of the bigger changes are: - Addition of (new) PCI-e support on Tegra. - More Tegra4 support, including PMC configuration for Dalmore. - Addition of a new board for Exynos4 (trats2) and more bindings for 4x12 IP. - Addition of Allwinner A20 and A31 SoC and board files. - Move of the ST Ericsson device tree files to now use ste-* prefix. - More move of hardware description of shmobile platforms to DT. - Two new board dts files for Freescale MXs. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJSKhJrAAoJEIwa5zzehBx3O6YP/AzskDtXdgdaopgZXVQxCIhE svby8xG2pcFvuAYEv7KNwgk02oC+B5JrUj7ZG42IOPeVo4HN7k80ehxmP5MZwnqs LpvBRXqUGAzEoJRhCD/lF4tuw+J5R/XgVWkIVz4nQ8tLdsSWJ3QY5LSS6ePTP6Qi 2B3AbeW/7DSada7lHJE9CqIX5xienLo4YgfCWXHNT8ouFGfqKjBxqIbCFyvzrGfs jSsIsqy1IO0hnk61yHtbPCRl9FJg2rbVwqHBZvKHMW0ls19Q42chlK/dPO5JCb4w VWMqbdOr8fnbqzicVqUPbShYZjgEd5I6PUgZMXJqEacgX9dj3SfOOtcR9kfrntHE of7Wi3FzVzWTzclRnub9nHrBIwvThAr+WX+mvbZrD+tuQte8qkFZXO9mw5/hRA7M K1O1HgaH1R1Xcdo69EWx9o94NYJ9Vs9F6wmS2+nb1B8u83Ee2Uq0GES5oyYqhU56 qg8FOMYUBDwXlHpjt1qiSwAYrabdCyxMx8lt351bxmiyKRFx0hmyGsv6HvlHJ7Oz hn6xHcNyIoCIuOvWxiLmKKU2ameDn16uSd71MSwomnQ+U4V+QzoqQ4QDgYD6Sgd5 5fln3OYV3JniWeYFw9DkSLKQTYBodz06wA+XOurcNWs3Ls0E9GilKFixKC6GoEVC uIywadgelMfDux8GGD3x =1GuI -----END PGP SIGNATURE----- Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC DT updates from Olof Johansson: "Device tree and bindings updates for 3.12. General additions of various on-chip and on-board peripherals on various platforms as support gets added. Some of the bigger changes are: - Addition of (new) PCI-e support on Tegra. - More Tegra4 support, including PMC configuration for Dalmore. - Addition of a new board for Exynos4 (trats2) and more bindings for 4x12 IP. - Addition of Allwinner A20 and A31 SoC and board files. - Move of the ST Ericsson device tree files to now use ste-* prefix. - More move of hardware description of shmobile platforms to DT. - Two new board dts files for Freescale MXs" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (177 commits) dts: Rename DW APB timer compatible strings dts: Deprecate ALTR as a vendor prefix of: add vendor prefix for Altera Corp. ARM: at91/dt: sam9x5ek: add sound configuration ARM: at91/dt: sam9x5ek: enable SSC ARM: at91/dt: sam9x5ek: add WM8731 codec ARM: at91/dt: sam9x5: add SSC DMA parameters ARM: at91/dt: add at91rm9200 PQFP package version ARM: at91: at91rm9200: set default mmc0 pinctrl-names ARM: at91: at91sam9n12: correct pin number of gpio-key ARM: at91: at91sam9n12: add qt1070 support ARM: at91: at91sam9n12: add pinctrl of TWI ARM: at91: Add PMU support for sama5d3 ARM: at91: at91sam9260: add missing pinctrl-names on mmc ARM: tegra: configure power off for Dalmore ARM: DT: binding fixup to align with vendor-prefixes.txt (DT) ARM: dts: add sdio blocks to bcm28155-ap board ARM: dts: align sdio numbers to HW definition ARM: sun7i: Add Olimex A20-Olinuxino-Micro support ARM: sun7i: Add Allwinner A20 DTSI ...
301 lines
7.2 KiB
C
301 lines
7.2 KiB
C
/*
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* Altera SPI driver
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*
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* Copyright (C) 2008 Thomas Chou <thomas@wytron.com.tw>
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*
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* Based on spi_s3c24xx.c, which is:
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* Copyright (c) 2006 Ben Dooks
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* Copyright (c) 2006 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/errno.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/spi_bitbang.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#define DRV_NAME "spi_altera"
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#define ALTERA_SPI_RXDATA 0
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#define ALTERA_SPI_TXDATA 4
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#define ALTERA_SPI_STATUS 8
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#define ALTERA_SPI_CONTROL 12
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#define ALTERA_SPI_SLAVE_SEL 20
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#define ALTERA_SPI_STATUS_ROE_MSK 0x8
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#define ALTERA_SPI_STATUS_TOE_MSK 0x10
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#define ALTERA_SPI_STATUS_TMT_MSK 0x20
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#define ALTERA_SPI_STATUS_TRDY_MSK 0x40
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#define ALTERA_SPI_STATUS_RRDY_MSK 0x80
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#define ALTERA_SPI_STATUS_E_MSK 0x100
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#define ALTERA_SPI_CONTROL_IROE_MSK 0x8
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#define ALTERA_SPI_CONTROL_ITOE_MSK 0x10
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#define ALTERA_SPI_CONTROL_ITRDY_MSK 0x40
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#define ALTERA_SPI_CONTROL_IRRDY_MSK 0x80
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#define ALTERA_SPI_CONTROL_IE_MSK 0x100
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#define ALTERA_SPI_CONTROL_SSO_MSK 0x400
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struct altera_spi {
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/* bitbang has to be first */
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struct spi_bitbang bitbang;
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struct completion done;
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void __iomem *base;
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int irq;
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int len;
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int count;
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int bytes_per_word;
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unsigned long imr;
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/* data buffers */
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const unsigned char *tx;
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unsigned char *rx;
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};
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static inline struct altera_spi *altera_spi_to_hw(struct spi_device *sdev)
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{
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return spi_master_get_devdata(sdev->master);
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}
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static void altera_spi_chipsel(struct spi_device *spi, int value)
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{
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struct altera_spi *hw = altera_spi_to_hw(spi);
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if (spi->mode & SPI_CS_HIGH) {
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switch (value) {
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case BITBANG_CS_INACTIVE:
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writel(1 << spi->chip_select,
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hw->base + ALTERA_SPI_SLAVE_SEL);
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hw->imr |= ALTERA_SPI_CONTROL_SSO_MSK;
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writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
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break;
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case BITBANG_CS_ACTIVE:
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hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK;
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writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
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writel(0, hw->base + ALTERA_SPI_SLAVE_SEL);
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break;
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}
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} else {
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switch (value) {
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case BITBANG_CS_INACTIVE:
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hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK;
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writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
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break;
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case BITBANG_CS_ACTIVE:
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writel(1 << spi->chip_select,
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hw->base + ALTERA_SPI_SLAVE_SEL);
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hw->imr |= ALTERA_SPI_CONTROL_SSO_MSK;
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writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
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break;
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}
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}
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}
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static inline unsigned int hw_txbyte(struct altera_spi *hw, int count)
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{
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if (hw->tx) {
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switch (hw->bytes_per_word) {
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case 1:
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return hw->tx[count];
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case 2:
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return (hw->tx[count * 2]
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| (hw->tx[count * 2 + 1] << 8));
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}
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}
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return 0;
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}
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static int altera_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
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{
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struct altera_spi *hw = altera_spi_to_hw(spi);
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hw->tx = t->tx_buf;
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hw->rx = t->rx_buf;
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hw->count = 0;
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hw->bytes_per_word = DIV_ROUND_UP(t->bits_per_word, 8);
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hw->len = t->len / hw->bytes_per_word;
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if (hw->irq >= 0) {
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/* enable receive interrupt */
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hw->imr |= ALTERA_SPI_CONTROL_IRRDY_MSK;
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writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
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/* send the first byte */
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writel(hw_txbyte(hw, 0), hw->base + ALTERA_SPI_TXDATA);
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wait_for_completion(&hw->done);
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/* disable receive interrupt */
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hw->imr &= ~ALTERA_SPI_CONTROL_IRRDY_MSK;
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writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
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} else {
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while (hw->count < hw->len) {
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unsigned int rxd;
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writel(hw_txbyte(hw, hw->count),
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hw->base + ALTERA_SPI_TXDATA);
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while (!(readl(hw->base + ALTERA_SPI_STATUS) &
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ALTERA_SPI_STATUS_RRDY_MSK))
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cpu_relax();
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rxd = readl(hw->base + ALTERA_SPI_RXDATA);
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if (hw->rx) {
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switch (hw->bytes_per_word) {
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case 1:
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hw->rx[hw->count] = rxd;
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break;
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case 2:
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hw->rx[hw->count * 2] = rxd;
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hw->rx[hw->count * 2 + 1] = rxd >> 8;
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break;
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}
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}
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hw->count++;
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}
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}
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return hw->count * hw->bytes_per_word;
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}
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static irqreturn_t altera_spi_irq(int irq, void *dev)
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{
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struct altera_spi *hw = dev;
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unsigned int rxd;
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rxd = readl(hw->base + ALTERA_SPI_RXDATA);
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if (hw->rx) {
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switch (hw->bytes_per_word) {
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case 1:
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hw->rx[hw->count] = rxd;
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break;
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case 2:
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hw->rx[hw->count * 2] = rxd;
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hw->rx[hw->count * 2 + 1] = rxd >> 8;
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break;
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}
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}
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hw->count++;
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if (hw->count < hw->len)
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writel(hw_txbyte(hw, hw->count), hw->base + ALTERA_SPI_TXDATA);
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else
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complete(&hw->done);
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return IRQ_HANDLED;
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}
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static int altera_spi_probe(struct platform_device *pdev)
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{
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struct altera_spi_platform_data *platp = dev_get_platdata(&pdev->dev);
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struct altera_spi *hw;
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struct spi_master *master;
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struct resource *res;
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int err = -ENODEV;
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master = spi_alloc_master(&pdev->dev, sizeof(struct altera_spi));
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if (!master)
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return err;
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/* setup the master state. */
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master->bus_num = pdev->id;
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master->num_chipselect = 16;
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master->mode_bits = SPI_CS_HIGH;
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hw = spi_master_get_devdata(master);
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platform_set_drvdata(pdev, hw);
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/* setup the state for the bitbang driver */
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hw->bitbang.master = spi_master_get(master);
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if (!hw->bitbang.master)
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return err;
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hw->bitbang.chipselect = altera_spi_chipsel;
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hw->bitbang.txrx_bufs = altera_spi_txrx;
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/* find and map our resources */
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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hw->base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(hw->base)) {
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err = PTR_ERR(hw->base);
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goto exit;
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}
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/* program defaults into the registers */
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hw->imr = 0; /* disable spi interrupts */
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writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
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writel(0, hw->base + ALTERA_SPI_STATUS); /* clear status reg */
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if (readl(hw->base + ALTERA_SPI_STATUS) & ALTERA_SPI_STATUS_RRDY_MSK)
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readl(hw->base + ALTERA_SPI_RXDATA); /* flush rxdata */
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/* irq is optional */
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hw->irq = platform_get_irq(pdev, 0);
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if (hw->irq >= 0) {
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init_completion(&hw->done);
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err = devm_request_irq(&pdev->dev, hw->irq, altera_spi_irq, 0,
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pdev->name, hw);
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if (err)
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goto exit;
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}
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/* find platform data */
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if (!platp)
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hw->bitbang.master->dev.of_node = pdev->dev.of_node;
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/* register our spi controller */
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err = spi_bitbang_start(&hw->bitbang);
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if (err)
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goto exit;
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dev_info(&pdev->dev, "base %p, irq %d\n", hw->base, hw->irq);
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return 0;
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exit:
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spi_master_put(master);
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return err;
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}
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static int altera_spi_remove(struct platform_device *dev)
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{
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struct altera_spi *hw = platform_get_drvdata(dev);
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struct spi_master *master = hw->bitbang.master;
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spi_bitbang_stop(&hw->bitbang);
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spi_master_put(master);
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return 0;
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}
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#ifdef CONFIG_OF
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static const struct of_device_id altera_spi_match[] = {
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{ .compatible = "ALTR,spi-1.0", },
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{ .compatible = "altr,spi-1.0", },
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{},
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};
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MODULE_DEVICE_TABLE(of, altera_spi_match);
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#endif /* CONFIG_OF */
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static struct platform_driver altera_spi_driver = {
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.probe = altera_spi_probe,
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.remove = altera_spi_remove,
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.driver = {
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.name = DRV_NAME,
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.owner = THIS_MODULE,
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.pm = NULL,
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.of_match_table = of_match_ptr(altera_spi_match),
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},
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};
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module_platform_driver(altera_spi_driver);
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MODULE_DESCRIPTION("Altera SPI driver");
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MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:" DRV_NAME);
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