111 lines
3.0 KiB
Plaintext
111 lines
3.0 KiB
Plaintext
#
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# FPGA framework configuration
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#
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menu "FPGA Configuration Support"
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config FPGA
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tristate "FPGA Configuration Framework"
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help
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Say Y here if you want support for configuring FPGAs from the
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kernel. The FPGA framework adds a FPGA manager class and FPGA
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manager drivers.
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if FPGA
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config FPGA_REGION
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tristate "FPGA Region"
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depends on OF && FPGA_BRIDGE
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help
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FPGA Regions allow loading FPGA images under control of
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the Device Tree.
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config FPGA_MGR_ICE40_SPI
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tristate "Lattice iCE40 SPI"
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depends on OF && SPI
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help
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FPGA manager driver support for Lattice iCE40 FPGAs over SPI.
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config FPGA_MGR_SOCFPGA
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tristate "Altera SOCFPGA FPGA Manager"
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depends on ARCH_SOCFPGA || COMPILE_TEST
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help
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FPGA manager driver support for Altera SOCFPGA.
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config FPGA_MGR_SOCFPGA_A10
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tristate "Altera SoCFPGA Arria10"
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depends on ARCH_SOCFPGA || COMPILE_TEST
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select REGMAP_MMIO
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help
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FPGA manager driver support for Altera Arria10 SoCFPGA.
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config FPGA_MGR_TS73XX
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tristate "Technologic Systems TS-73xx SBC FPGA Manager"
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depends on ARCH_EP93XX && MACH_TS72XX
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help
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FPGA manager driver support for the Altera Cyclone II FPGA
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present on the TS-73xx SBC boards.
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config FPGA_MGR_XILINX_SPI
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tristate "Xilinx Configuration over Slave Serial (SPI)"
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depends on SPI
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help
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FPGA manager driver support for Xilinx FPGA configuration
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over slave serial interface.
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config FPGA_MGR_ZYNQ_FPGA
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tristate "Xilinx Zynq FPGA"
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depends on ARCH_ZYNQ || COMPILE_TEST
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depends on HAS_DMA
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help
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FPGA manager driver support for Xilinx Zynq FPGAs.
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config FPGA_BRIDGE
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tristate "FPGA Bridge Framework"
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depends on OF
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help
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Say Y here if you want to support bridges connected between host
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processors and FPGAs or between FPGAs.
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config SOCFPGA_FPGA_BRIDGE
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tristate "Altera SoCFPGA FPGA Bridges"
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depends on ARCH_SOCFPGA && FPGA_BRIDGE
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help
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Say Y to enable drivers for FPGA bridges for Altera SOCFPGA
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devices.
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config ALTERA_FREEZE_BRIDGE
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tristate "Altera FPGA Freeze Bridge"
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depends on ARCH_SOCFPGA && FPGA_BRIDGE
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help
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Say Y to enable drivers for Altera FPGA Freeze bridges. A
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freeze bridge is a bridge that exists in the FPGA fabric to
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isolate one region of the FPGA from the busses while that
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region is being reprogrammed.
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config ALTERA_PR_IP_CORE
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tristate "Altera Partial Reconfiguration IP Core"
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help
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Core driver support for Altera Partial Reconfiguration IP component
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config ALTERA_PR_IP_CORE_PLAT
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tristate "Platform support of Altera Partial Reconfiguration IP Core"
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depends on ALTERA_PR_IP_CORE && OF && HAS_IOMEM
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help
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Platform driver support for Altera Partial Reconfiguration IP
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component
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config XILINX_PR_DECOUPLER
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tristate "Xilinx LogiCORE PR Decoupler"
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depends on FPGA_BRIDGE
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depends on HAS_IOMEM
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help
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Say Y to enable drivers for Xilinx LogiCORE PR Decoupler.
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The PR Decoupler exists in the FPGA fabric to isolate one
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region of the FPGA from the busses while that region is
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being reprogrammed during partial reconfig.
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endif # FPGA
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endmenu
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