5136237bc3
The order of the set and mask operation in sm501_init_reg() was setting and then masking the bits set. Correct the order so that we do not end up with 288MHz SDRAM clocks on certain systems. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| mcp-core.c | ||
| mcp-sa11x0.c | ||
| mcp.h | ||
| sm501.c | ||
| ucb1x00-assabet.c | ||
| ucb1x00-core.c | ||
| ucb1x00-ts.c | ||
| ucb1x00.h | ||