linux/arch/arm64
Catalin Marinas 53631b54c8 arm64: Floating point and SIMD
This patch adds support for FP/ASIMD register bank saving and restoring
during context switch and FP exception handling to generate SIGFPE.
There are 32 128-bit registers and the context switching is currently
done non-lazily. Benchmarks on real hardware are required before
implementing lazy FP state saving/restoring.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-09-17 13:42:13 +01:00
..
include/asm arm64: Floating point and SIMD 2012-09-17 13:42:13 +01:00
kernel arm64: Floating point and SIMD 2012-09-17 13:42:13 +01:00
lib arm64: User access library functions 2012-09-17 13:42:11 +01:00
mm arm64: DMA mapping API 2012-09-17 13:42:05 +01:00