linux/arch/powerpc/perf
Michael Ellerman e9aaac1ac3 powerpc/perf: Fix handling of L3 events with bank == 1
Currently we reject events which have the L3 bank == 1, such as
0x000084918F, because the cache field is non-zero.

However that is incorrect, because although the bank is non-zero, the
value we would write into MMCRC is zero, and so we can count the event.

So fix the check to ignore the bank selector when checking whether the
cache selector is non-zero.

Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2014-03-24 09:48:33 +11:00
..
bhrb.S
callchain.c
core-book3s.c powerpc/perf: Enable BHRB access for EBB events 2014-03-24 09:48:27 +11:00
core-fsl-emb.c
e500-pmu.c
e6500-pmu.c
hv-24x7-catalog.h powerpc/perf: Add 24x7 interface headers 2014-03-24 09:48:29 +11:00
hv-24x7.c powerpc/perf: Add support for the hv 24x7 interface 2014-03-24 09:48:32 +11:00
hv-24x7.h powerpc/perf: Add 24x7 interface headers 2014-03-24 09:48:29 +11:00
hv-common.c powerpc/perf: Add a shared interface to get gpci version and capabilities 2014-03-24 09:48:30 +11:00
hv-common.h powerpc/perf: Add macros for defining event fields & formats 2014-03-24 09:48:31 +11:00
hv-gpci.c powerpc/perf: Add support for the hv gpci (get performance counter info) interface 2014-03-24 09:48:31 +11:00
hv-gpci.h powerpc/perf: Add hv_gpci interface header 2014-03-24 09:48:29 +11:00
Makefile powerpc/perf: Add kconfig option for hypervisor provided counters 2014-03-24 09:48:32 +11:00
mpc7450-pmu.c
power4-pmu.c
power5-pmu.c
power5+-pmu.c
power6-pmu.c
power7-events-list.h powerpc/perf: Make some new raw event codes available in sysfs 2014-03-24 09:48:23 +11:00
power7-pmu.c
power8-pmu.c powerpc/perf: Fix handling of L3 events with bank == 1 2014-03-24 09:48:33 +11:00
ppc970-pmu.c