3081e43b97
In anticipation of PMU support for Realview boards, the IRQs defined for some of these boards need updating. This patch removes incorrect L220 IRQ definitions, corrects incorrect PMU IRQs and adds any missing IRQs that are required. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
95 lines
3.9 KiB
C
95 lines
3.9 KiB
C
/*
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* arch/arm/mach-realview/include/mach/irqs-pba8.h
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*
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* Copyright (C) 2008 ARM Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#ifndef __MACH_IRQS_PBA8_H
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#define __MACH_IRQS_PBA8_H
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#define IRQ_PBA8_GIC_START 32
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/*
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* PB-A8 on-board gic irq sources
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*/
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#define IRQ_PBA8_WATCHDOG (IRQ_PBA8_GIC_START + 0) /* Watchdog timer */
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#define IRQ_PBA8_SOFT (IRQ_PBA8_GIC_START + 1) /* Software interrupt */
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#define IRQ_PBA8_COMMRx (IRQ_PBA8_GIC_START + 2) /* Debug Comm Rx interrupt */
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#define IRQ_PBA8_COMMTx (IRQ_PBA8_GIC_START + 3) /* Debug Comm Tx interrupt */
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#define IRQ_PBA8_TIMER0_1 (IRQ_PBA8_GIC_START + 4) /* Timer 0/1 (default timer) */
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#define IRQ_PBA8_TIMER2_3 (IRQ_PBA8_GIC_START + 5) /* Timer 2/3 */
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#define IRQ_PBA8_GPIO0 (IRQ_PBA8_GIC_START + 6) /* GPIO 0 */
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#define IRQ_PBA8_GPIO1 (IRQ_PBA8_GIC_START + 7) /* GPIO 1 */
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#define IRQ_PBA8_GPIO2 (IRQ_PBA8_GIC_START + 8) /* GPIO 2 */
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/* 9 reserved */
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#define IRQ_PBA8_RTC (IRQ_PBA8_GIC_START + 10) /* Real Time Clock */
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#define IRQ_PBA8_SSP (IRQ_PBA8_GIC_START + 11) /* Synchronous Serial Port */
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#define IRQ_PBA8_UART0 (IRQ_PBA8_GIC_START + 12) /* UART 0 on development chip */
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#define IRQ_PBA8_UART1 (IRQ_PBA8_GIC_START + 13) /* UART 1 on development chip */
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#define IRQ_PBA8_UART2 (IRQ_PBA8_GIC_START + 14) /* UART 2 on development chip */
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#define IRQ_PBA8_UART3 (IRQ_PBA8_GIC_START + 15) /* UART 3 on development chip */
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#define IRQ_PBA8_SCI (IRQ_PBA8_GIC_START + 16) /* Smart Card Interface */
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#define IRQ_PBA8_MMCI0A (IRQ_PBA8_GIC_START + 17) /* Multimedia Card 0A */
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#define IRQ_PBA8_MMCI0B (IRQ_PBA8_GIC_START + 18) /* Multimedia Card 0B */
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#define IRQ_PBA8_AACI (IRQ_PBA8_GIC_START + 19) /* Audio Codec */
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#define IRQ_PBA8_KMI0 (IRQ_PBA8_GIC_START + 20) /* Keyboard/Mouse port 0 */
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#define IRQ_PBA8_KMI1 (IRQ_PBA8_GIC_START + 21) /* Keyboard/Mouse port 1 */
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#define IRQ_PBA8_CHARLCD (IRQ_PBA8_GIC_START + 22) /* Character LCD */
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#define IRQ_PBA8_CLCD (IRQ_PBA8_GIC_START + 23) /* CLCD controller */
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#define IRQ_PBA8_DMAC (IRQ_PBA8_GIC_START + 24) /* DMA controller */
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#define IRQ_PBA8_PWRFAIL (IRQ_PBA8_GIC_START + 25) /* Power failure */
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#define IRQ_PBA8_PISMO (IRQ_PBA8_GIC_START + 26) /* PISMO interface */
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#define IRQ_PBA8_DoC (IRQ_PBA8_GIC_START + 27) /* Disk on Chip memory controller */
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#define IRQ_PBA8_ETH (IRQ_PBA8_GIC_START + 28) /* Ethernet controller */
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#define IRQ_PBA8_USB (IRQ_PBA8_GIC_START + 29) /* USB controller */
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#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */
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#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */
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#define IRQ_PBA8_PMU (IRQ_PBA8_GIC_START + 47) /* Cortex-A8 PMU */
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/* ... */
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#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50)
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#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51)
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#define IRQ_PBA8_PCI2 (IRQ_PBA8_GIC_START + 52)
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#define IRQ_PBA8_PCI3 (IRQ_PBA8_GIC_START + 53)
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#define IRQ_PBA8_SMC -1
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#define IRQ_PBA8_SCTL -1
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#define NR_GIC_PBA8 1
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/*
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* Only define NR_IRQS if less than NR_IRQS_PBA8
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*/
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#define NR_IRQS_PBA8 (IRQ_PBA8_GIC_START + 64)
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#if defined(CONFIG_MACH_REALVIEW_PBA8)
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#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBA8)
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#undef NR_IRQS
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#define NR_IRQS NR_IRQS_PBA8
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#endif
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#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBA8)
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#undef MAX_GIC_NR
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#define MAX_GIC_NR NR_GIC_PBA8
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#endif
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#endif /* CONFIG_MACH_REALVIEW_PBA8 */
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#endif /* __MACH_IRQS_PBA8_H */
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