a812dcc3a2
Add UV support to xpc_remote_memcpy(), which involves interfacing to the GRU driver. Signed-off-by: Dean Nelson <dcn@sgi.com> Cc: Jack Steiner <steiner@sgi.com> Cc: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
147 lines
3.5 KiB
C
147 lines
3.5 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
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*/
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/*
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* Cross Partition (XP) sn2-based functions.
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*
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* Architecture specific implementation of common functions.
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*/
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#include <linux/module.h>
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#include <linux/device.h>
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#include <asm/sn/bte.h>
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#include <asm/sn/sn_sal.h>
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#include "xp.h"
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/*
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* The export of xp_nofault_PIOR needs to happen here since it is defined
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* in drivers/misc/sgi-xp/xp_nofault.S. The target of the nofault read is
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* defined here.
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*/
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EXPORT_SYMBOL_GPL(xp_nofault_PIOR);
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u64 xp_nofault_PIOR_target;
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EXPORT_SYMBOL_GPL(xp_nofault_PIOR_target);
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/*
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* Register a nofault code region which performs a cross-partition PIO read.
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* If the PIO read times out, the MCA handler will consume the error and
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* return to a kernel-provided instruction to indicate an error. This PIO read
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* exists because it is guaranteed to timeout if the destination is down
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* (amo operations do not timeout on at least some CPUs on Shubs <= v1.2,
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* which unfortunately we have to work around).
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*/
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static enum xp_retval
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xp_register_nofault_code_sn2(void)
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{
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int ret;
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u64 func_addr;
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u64 err_func_addr;
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func_addr = *(u64 *)xp_nofault_PIOR;
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err_func_addr = *(u64 *)xp_error_PIOR;
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ret = sn_register_nofault_code(func_addr, err_func_addr, err_func_addr,
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1, 1);
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if (ret != 0) {
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dev_err(xp, "can't register nofault code, error=%d\n", ret);
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return xpSalError;
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}
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/*
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* Setup the nofault PIO read target. (There is no special reason why
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* SH_IPI_ACCESS was selected.)
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*/
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if (is_shub1())
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xp_nofault_PIOR_target = SH1_IPI_ACCESS;
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else if (is_shub2())
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xp_nofault_PIOR_target = SH2_IPI_ACCESS0;
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return xpSuccess;
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}
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static void
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xp_unregister_nofault_code_sn2(void)
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{
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u64 func_addr = *(u64 *)xp_nofault_PIOR;
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u64 err_func_addr = *(u64 *)xp_error_PIOR;
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/* unregister the PIO read nofault code region */
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(void)sn_register_nofault_code(func_addr, err_func_addr,
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err_func_addr, 1, 0);
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}
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/*
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* Convert a virtual memory address to a physical memory address.
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*/
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static unsigned long
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xp_pa_sn2(void *addr)
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{
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return __pa(addr);
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}
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/*
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* Wrapper for bte_copy().
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*
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* dst_pa - physical address of the destination of the transfer.
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* src_pa - physical address of the source of the transfer.
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* len - number of bytes to transfer from source to destination.
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*
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* Note: xp_remote_memcpy_sn2() should never be called while holding a spinlock.
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*/
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static enum xp_retval
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xp_remote_memcpy_sn2(unsigned long dst_pa, const unsigned long src_pa,
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size_t len)
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{
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bte_result_t ret;
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ret = bte_copy(src_pa, dst_pa, len, (BTE_NOTIFY | BTE_WACQUIRE), NULL);
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if (ret == BTE_SUCCESS)
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return xpSuccess;
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if (is_shub2()) {
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dev_err(xp, "bte_copy() on shub2 failed, error=0x%x dst_pa="
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"0x%016lx src_pa=0x%016lx len=%ld\\n", ret, dst_pa,
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src_pa, len);
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} else {
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dev_err(xp, "bte_copy() failed, error=%d dst_pa=0x%016lx "
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"src_pa=0x%016lx len=%ld\\n", ret, dst_pa, src_pa, len);
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}
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return xpBteCopyError;
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}
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static int
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xp_cpu_to_nasid_sn2(int cpuid)
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{
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return cpuid_to_nasid(cpuid);
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}
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enum xp_retval
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xp_init_sn2(void)
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{
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BUG_ON(!is_shub());
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xp_max_npartitions = XP_MAX_NPARTITIONS_SN2;
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xp_partition_id = sn_partition_id;
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xp_region_size = sn_region_size;
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xp_pa = xp_pa_sn2;
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xp_remote_memcpy = xp_remote_memcpy_sn2;
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xp_cpu_to_nasid = xp_cpu_to_nasid_sn2;
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return xp_register_nofault_code_sn2();
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}
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void
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xp_exit_sn2(void)
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{
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BUG_ON(!is_shub());
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xp_unregister_nofault_code_sn2();
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}
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