ae32a5b321
Some clock control regsiter has bit to reset the cotroller. So before enable the clock, we need deassert the reset pin. Make use of reset controller framework to export reset interface for device drivers, then device driver can control the reset action. Signed-off-by: Chao Xie <chao.xie@marvell.com> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
32 lines
635 B
C
32 lines
635 B
C
#ifndef __MACH_MMP_CLK_RESET_H
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#define __MACH_MMP_CLK_RESET_H
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#include <linux/reset-controller.h>
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#define MMP_RESET_INVERT 1
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struct mmp_clk_reset_cell {
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unsigned int clk_id;
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void __iomem *reg;
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u32 bits;
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unsigned int flags;
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spinlock_t *lock;
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};
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struct mmp_clk_reset_unit {
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struct reset_controller_dev rcdev;
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struct mmp_clk_reset_cell *cells;
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};
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#ifdef CONFIG_RESET_CONTROLLER
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void mmp_clk_reset_register(struct device_node *np,
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struct mmp_clk_reset_cell *cells, int nr_resets);
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#else
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static inline void mmp_clk_reset_register(struct device_node *np,
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struct mmp_clk_reset_cell *cells, int nr_resets)
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{
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}
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#endif
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#endif
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