- new identifier for the 8110SCe
- the PCI latency timer is set unconditionally. This part is identical
in Realtek's r8168 (8.001.00) and r8101 (1.001.00)
- initialization of the cache line size register is for the 8169s only
- more magic in rtl_hw_start_8169
- it is not possible to factor out the setting of the the irq event mask
with the 8168 and the 8101 any more. Pushed it into the hw_start handler.
- rtl_set_rx_tx_config_registers() and write to the ChipCmd register are
issued identically for the whole 8169/8110 family: the 8110SCd/8110SCe
are handled the same way
- work around for AMD platform.
Some registers definitions in Realtek's driver are let aside for later.
Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Cc: Edward Hsu <edward_hsu@realtek.com.tw>
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