ce965c3d2e
According to the Armada 370 and Armada XP datasheets, the part of the Device Bus register that configure the bus width should contain 0 for a 8 bits bus width, and 1 for a 16 bits bus width (other values are unsupported/reserved). However, the current conversion done in the driver to convert from a bus width in bits to the value expected by the register leads to setting the register to 1 for a 8 bits bus, and 2 for a 16 bits bus. This mistake was compensated by a mistake in the existing Device Tree files for Armada 370/XP platforms: they were declaring a 8 bits bus width, while the hardware in fact uses a 16 bits bus width. This commit fixes that by adjusting the conversion logic. This patch fixes a bug that was introduced in |
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| .. | ||
| emif.c | ||
| emif.h | ||
| fsl_ifc.c | ||
| Kconfig | ||
| Makefile | ||
| mvebu-devbus.c | ||
| of_memory.c | ||
| of_memory.h | ||
| tegra20-mc.c | ||
| tegra30-mc.c | ||
| ti-aemif.c | ||