65b97fb730
Pull powerpc updates from Ben Herrenschmidt: "This is the powerpc changes for the 3.11 merge window. In addition to the usual bug fixes and small updates, the main highlights are: - Support for transparent huge pages by Aneesh Kumar for 64-bit server processors. This allows the use of 16M pages as transparent huge pages on kernels compiled with a 64K base page size. - Base VFIO support for KVM on power by Alexey Kardashevskiy - Wiring up of our nvram to the pstore infrastructure, including putting compressed oopses in there by Aruna Balakrishnaiah - Move, rework and improve our "EEH" (basically PCI error handling and recovery) infrastructure. It is no longer specific to pseries but is now usable by the new "powernv" platform as well (no hypervisor) by Gavin Shan. - I fixed some bugs in our math-emu instruction decoding and made it usable to emulate some optional FP instructions on processors with hard FP that lack them (such as fsqrt on Freescale embedded processors). - Support for Power8 "Event Based Branch" facility by Michael Ellerman. This facility allows what is basically "userspace interrupts" for performance monitor events. - A bunch of Transactional Memory vs. Signals bug fixes and HW breakpoint/watchpoint fixes by Michael Neuling. And more ... I appologize in advance if I've failed to highlight something that somebody deemed worth it." * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (156 commits) pstore: Add hsize argument in write_buf call of pstore_ftrace_call powerpc/fsl: add MPIC timer wakeup support powerpc/mpic: create mpic subsystem object powerpc/mpic: add global timer support powerpc/mpic: add irq_set_wake support powerpc/85xx: enable coreint for all the 64bit boards powerpc/8xx: Erroneous double irq_eoi() on CPM IRQ in MPC8xx powerpc/fsl: Enable CONFIG_E1000E in mpc85xx_smp_defconfig powerpc/mpic: Add get_version API both for internal and external use powerpc: Handle both new style and old style reserve maps powerpc/hw_brk: Fix off by one error when validating DAWR region end powerpc/pseries: Support compression of oops text via pstore powerpc/pseries: Re-organise the oops compression code pstore: Pass header size in the pstore write callback powerpc/powernv: Fix iommu initialization again powerpc/pseries: Inform the hypervisor we are using EBB regs powerpc/perf: Add power8 EBB support powerpc/perf: Core EBB support for 64-bit book3s powerpc/perf: Drop MMCRA from thread_struct powerpc/perf: Don't enable if we have zero events ...
354 lines
8.9 KiB
C
354 lines
8.9 KiB
C
/*
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* Copyright (C) 2009 SUSE Linux Products GmbH. All rights reserved.
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*
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* Authors:
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* Alexander Graf <agraf@suse.de>
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* Kevin Wolf <mail@kevin-wolf.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#include <linux/kvm_host.h>
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#include <asm/kvm_ppc.h>
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#include <asm/kvm_book3s.h>
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#include <asm/mmu-hash64.h>
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#include <asm/machdep.h>
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#include <asm/mmu_context.h>
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#include <asm/hw_irq.h>
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#include "trace.h"
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#define PTE_SIZE 12
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void kvmppc_mmu_invalidate_pte(struct kvm_vcpu *vcpu, struct hpte_cache *pte)
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{
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ppc_md.hpte_invalidate(pte->slot, pte->host_vpn,
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MMU_PAGE_4K, MMU_PAGE_4K, MMU_SEGSIZE_256M,
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false);
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}
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/* We keep 512 gvsid->hvsid entries, mapping the guest ones to the array using
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* a hash, so we don't waste cycles on looping */
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static u16 kvmppc_sid_hash(struct kvm_vcpu *vcpu, u64 gvsid)
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{
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return (u16)(((gvsid >> (SID_MAP_BITS * 7)) & SID_MAP_MASK) ^
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((gvsid >> (SID_MAP_BITS * 6)) & SID_MAP_MASK) ^
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((gvsid >> (SID_MAP_BITS * 5)) & SID_MAP_MASK) ^
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((gvsid >> (SID_MAP_BITS * 4)) & SID_MAP_MASK) ^
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((gvsid >> (SID_MAP_BITS * 3)) & SID_MAP_MASK) ^
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((gvsid >> (SID_MAP_BITS * 2)) & SID_MAP_MASK) ^
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((gvsid >> (SID_MAP_BITS * 1)) & SID_MAP_MASK) ^
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((gvsid >> (SID_MAP_BITS * 0)) & SID_MAP_MASK));
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}
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static struct kvmppc_sid_map *find_sid_vsid(struct kvm_vcpu *vcpu, u64 gvsid)
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{
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struct kvmppc_sid_map *map;
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u16 sid_map_mask;
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if (vcpu->arch.shared->msr & MSR_PR)
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gvsid |= VSID_PR;
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sid_map_mask = kvmppc_sid_hash(vcpu, gvsid);
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map = &to_book3s(vcpu)->sid_map[sid_map_mask];
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if (map->valid && (map->guest_vsid == gvsid)) {
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trace_kvm_book3s_slb_found(gvsid, map->host_vsid);
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return map;
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}
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map = &to_book3s(vcpu)->sid_map[SID_MAP_MASK - sid_map_mask];
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if (map->valid && (map->guest_vsid == gvsid)) {
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trace_kvm_book3s_slb_found(gvsid, map->host_vsid);
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return map;
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}
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trace_kvm_book3s_slb_fail(sid_map_mask, gvsid);
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return NULL;
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}
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int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *orig_pte)
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{
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unsigned long vpn;
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pfn_t hpaddr;
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ulong hash, hpteg;
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u64 vsid;
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int ret;
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int rflags = 0x192;
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int vflags = 0;
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int attempt = 0;
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struct kvmppc_sid_map *map;
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int r = 0;
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/* Get host physical address for gpa */
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hpaddr = kvmppc_gfn_to_pfn(vcpu, orig_pte->raddr >> PAGE_SHIFT);
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if (is_error_noslot_pfn(hpaddr)) {
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printk(KERN_INFO "Couldn't get guest page for gfn %lx!\n", orig_pte->eaddr);
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r = -EINVAL;
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goto out;
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}
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hpaddr <<= PAGE_SHIFT;
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hpaddr |= orig_pte->raddr & (~0xfffULL & ~PAGE_MASK);
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/* and write the mapping ea -> hpa into the pt */
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vcpu->arch.mmu.esid_to_vsid(vcpu, orig_pte->eaddr >> SID_SHIFT, &vsid);
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map = find_sid_vsid(vcpu, vsid);
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if (!map) {
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ret = kvmppc_mmu_map_segment(vcpu, orig_pte->eaddr);
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WARN_ON(ret < 0);
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map = find_sid_vsid(vcpu, vsid);
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}
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if (!map) {
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printk(KERN_ERR "KVM: Segment map for 0x%llx (0x%lx) failed\n",
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vsid, orig_pte->eaddr);
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WARN_ON(true);
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r = -EINVAL;
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goto out;
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}
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vsid = map->host_vsid;
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vpn = hpt_vpn(orig_pte->eaddr, vsid, MMU_SEGSIZE_256M);
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if (!orig_pte->may_write)
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rflags |= HPTE_R_PP;
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else
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mark_page_dirty(vcpu->kvm, orig_pte->raddr >> PAGE_SHIFT);
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if (!orig_pte->may_execute)
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rflags |= HPTE_R_N;
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else
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kvmppc_mmu_flush_icache(hpaddr >> PAGE_SHIFT);
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hash = hpt_hash(vpn, PTE_SIZE, MMU_SEGSIZE_256M);
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map_again:
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hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP);
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/* In case we tried normal mapping already, let's nuke old entries */
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if (attempt > 1)
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if (ppc_md.hpte_remove(hpteg) < 0) {
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r = -1;
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goto out;
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}
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ret = ppc_md.hpte_insert(hpteg, vpn, hpaddr, rflags, vflags,
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MMU_PAGE_4K, MMU_PAGE_4K, MMU_SEGSIZE_256M);
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if (ret < 0) {
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/* If we couldn't map a primary PTE, try a secondary */
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hash = ~hash;
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vflags ^= HPTE_V_SECONDARY;
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attempt++;
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goto map_again;
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} else {
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struct hpte_cache *pte = kvmppc_mmu_hpte_cache_next(vcpu);
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trace_kvm_book3s_64_mmu_map(rflags, hpteg,
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vpn, hpaddr, orig_pte);
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/* The ppc_md code may give us a secondary entry even though we
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asked for a primary. Fix up. */
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if ((ret & _PTEIDX_SECONDARY) && !(vflags & HPTE_V_SECONDARY)) {
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hash = ~hash;
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hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP);
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}
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pte->slot = hpteg + (ret & 7);
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pte->host_vpn = vpn;
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pte->pte = *orig_pte;
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pte->pfn = hpaddr >> PAGE_SHIFT;
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kvmppc_mmu_hpte_cache_map(vcpu, pte);
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}
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kvm_release_pfn_clean(hpaddr >> PAGE_SHIFT);
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out:
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return r;
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}
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static struct kvmppc_sid_map *create_sid_map(struct kvm_vcpu *vcpu, u64 gvsid)
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{
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struct kvmppc_sid_map *map;
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struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
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u16 sid_map_mask;
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static int backwards_map = 0;
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if (vcpu->arch.shared->msr & MSR_PR)
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gvsid |= VSID_PR;
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/* We might get collisions that trap in preceding order, so let's
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map them differently */
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sid_map_mask = kvmppc_sid_hash(vcpu, gvsid);
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if (backwards_map)
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sid_map_mask = SID_MAP_MASK - sid_map_mask;
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map = &to_book3s(vcpu)->sid_map[sid_map_mask];
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/* Make sure we're taking the other map next time */
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backwards_map = !backwards_map;
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/* Uh-oh ... out of mappings. Let's flush! */
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if (vcpu_book3s->proto_vsid_next == vcpu_book3s->proto_vsid_max) {
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vcpu_book3s->proto_vsid_next = vcpu_book3s->proto_vsid_first;
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memset(vcpu_book3s->sid_map, 0,
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sizeof(struct kvmppc_sid_map) * SID_MAP_NUM);
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kvmppc_mmu_pte_flush(vcpu, 0, 0);
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kvmppc_mmu_flush_segments(vcpu);
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}
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map->host_vsid = vsid_scramble(vcpu_book3s->proto_vsid_next++, 256M);
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map->guest_vsid = gvsid;
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map->valid = true;
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trace_kvm_book3s_slb_map(sid_map_mask, gvsid, map->host_vsid);
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return map;
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}
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static int kvmppc_mmu_next_segment(struct kvm_vcpu *vcpu, ulong esid)
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{
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struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
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int i;
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int max_slb_size = 64;
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int found_inval = -1;
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int r;
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if (!svcpu->slb_max)
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svcpu->slb_max = 1;
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/* Are we overwriting? */
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for (i = 1; i < svcpu->slb_max; i++) {
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if (!(svcpu->slb[i].esid & SLB_ESID_V))
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found_inval = i;
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else if ((svcpu->slb[i].esid & ESID_MASK) == esid) {
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r = i;
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goto out;
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}
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}
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/* Found a spare entry that was invalidated before */
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if (found_inval > 0) {
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r = found_inval;
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goto out;
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}
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/* No spare invalid entry, so create one */
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if (mmu_slb_size < 64)
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max_slb_size = mmu_slb_size;
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/* Overflowing -> purge */
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if ((svcpu->slb_max) == max_slb_size)
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kvmppc_mmu_flush_segments(vcpu);
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r = svcpu->slb_max;
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svcpu->slb_max++;
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out:
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svcpu_put(svcpu);
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return r;
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}
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int kvmppc_mmu_map_segment(struct kvm_vcpu *vcpu, ulong eaddr)
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{
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struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
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u64 esid = eaddr >> SID_SHIFT;
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u64 slb_esid = (eaddr & ESID_MASK) | SLB_ESID_V;
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u64 slb_vsid = SLB_VSID_USER;
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u64 gvsid;
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int slb_index;
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struct kvmppc_sid_map *map;
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int r = 0;
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slb_index = kvmppc_mmu_next_segment(vcpu, eaddr & ESID_MASK);
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if (vcpu->arch.mmu.esid_to_vsid(vcpu, esid, &gvsid)) {
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/* Invalidate an entry */
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svcpu->slb[slb_index].esid = 0;
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r = -ENOENT;
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goto out;
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}
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map = find_sid_vsid(vcpu, gvsid);
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if (!map)
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map = create_sid_map(vcpu, gvsid);
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map->guest_esid = esid;
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slb_vsid |= (map->host_vsid << 12);
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slb_vsid &= ~SLB_VSID_KP;
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slb_esid |= slb_index;
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svcpu->slb[slb_index].esid = slb_esid;
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svcpu->slb[slb_index].vsid = slb_vsid;
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trace_kvm_book3s_slbmte(slb_vsid, slb_esid);
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out:
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svcpu_put(svcpu);
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return r;
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}
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void kvmppc_mmu_flush_segment(struct kvm_vcpu *vcpu, ulong ea, ulong seg_size)
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{
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struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
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ulong seg_mask = -seg_size;
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int i;
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for (i = 1; i < svcpu->slb_max; i++) {
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if ((svcpu->slb[i].esid & SLB_ESID_V) &&
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(svcpu->slb[i].esid & seg_mask) == ea) {
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/* Invalidate this entry */
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svcpu->slb[i].esid = 0;
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}
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}
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svcpu_put(svcpu);
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}
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void kvmppc_mmu_flush_segments(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
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svcpu->slb_max = 1;
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svcpu->slb[0].esid = 0;
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svcpu_put(svcpu);
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}
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void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
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{
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kvmppc_mmu_hpte_destroy(vcpu);
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__destroy_context(to_book3s(vcpu)->context_id[0]);
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}
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int kvmppc_mmu_init(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
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int err;
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err = __init_new_context();
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if (err < 0)
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return -1;
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vcpu3s->context_id[0] = err;
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vcpu3s->proto_vsid_max = ((u64)(vcpu3s->context_id[0] + 1)
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<< ESID_BITS) - 1;
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vcpu3s->proto_vsid_first = (u64)vcpu3s->context_id[0] << ESID_BITS;
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vcpu3s->proto_vsid_next = vcpu3s->proto_vsid_first;
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kvmppc_mmu_hpte_init(vcpu);
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return 0;
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}
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