linux/arch/mips/include/asm/mach-cavium-octeon
David Daney 2f19d080fb MIPS: Octeon: Enable C0_UserLocal probing.
Octeon2 processor cores have a UserLocal register.  Remove the hard
coded negative probe and allow the standard probing to detect this
feature.

Signed-off-by: David Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2578/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-24 01:44:41 +02:00
..
cpu-feature-overrides.h MIPS: Octeon: Enable C0_UserLocal probing. 2011-09-24 01:44:41 +02:00
dma-coherence.h
irq.h MIPS: Octeon: Rewrite interrupt handling code. 2011-03-29 14:48:06 +02:00
kernel-entry-init.h Octeon: Fix interrupt irq settings for performance counters. 2011-05-19 09:55:49 +01:00
war.h