60ffef065d
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0
("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
This removes all the parisc uses of the __cpuinit macros.
[1] https://lkml.org/lkml/2013/5/20/589
Acked-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Cc: Helge Deller <deller@gmx.de>
Cc: linux-parisc@vger.kernel.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
436 lines
12 KiB
C
436 lines
12 KiB
C
/*
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* Initial setup-routines for HP 9000 based hardware.
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*
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* Copyright (C) 1991, 1992, 1995 Linus Torvalds
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* Modifications for PA-RISC (C) 1999-2008 Helge Deller <deller@gmx.de>
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* Modifications copyright 1999 SuSE GmbH (Philipp Rumpf)
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* Modifications copyright 2000 Martin K. Petersen <mkp@mkp.net>
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* Modifications copyright 2000 Philipp Rumpf <prumpf@tux.org>
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* Modifications copyright 2001 Ryan Bradetich <rbradetich@uswest.net>
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*
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* Initial PA-RISC Version: 04-23-1999 by Helge Deller
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/seq_file.h>
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#include <linux/slab.h>
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#include <linux/cpu.h>
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#include <asm/param.h>
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#include <asm/cache.h>
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#include <asm/hardware.h> /* for register_parisc_driver() stuff */
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#include <asm/processor.h>
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#include <asm/page.h>
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#include <asm/pdc.h>
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#include <asm/pdcpat.h>
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#include <asm/irq.h> /* for struct irq_region */
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#include <asm/parisc-device.h>
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struct system_cpuinfo_parisc boot_cpu_data __read_mostly;
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EXPORT_SYMBOL(boot_cpu_data);
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DEFINE_PER_CPU(struct cpuinfo_parisc, cpu_data);
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extern int update_cr16_clocksource(void); /* from time.c */
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/*
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** PARISC CPU driver - claim "device" and initialize CPU data structures.
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**
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** Consolidate per CPU initialization into (mostly) one module.
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** Monarch CPU will initialize boot_cpu_data which shouldn't
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** change once the system has booted.
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**
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** The callback *should* do per-instance initialization of
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** everything including the monarch. "Per CPU" init code in
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** setup.c:start_parisc() has migrated here and start_parisc()
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** will call register_parisc_driver(&cpu_driver) before calling do_inventory().
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**
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** The goal of consolidating CPU initialization into one place is
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** to make sure all CPUs get initialized the same way.
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** The code path not shared is how PDC hands control of the CPU to the OS.
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** The initialization of OS data structures is the same (done below).
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*/
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/**
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* init_cpu_profiler - enable/setup per cpu profiling hooks.
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* @cpunum: The processor instance.
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*
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* FIXME: doesn't do much yet...
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*/
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static void
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init_percpu_prof(unsigned long cpunum)
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{
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struct cpuinfo_parisc *p;
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p = &per_cpu(cpu_data, cpunum);
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p->prof_counter = 1;
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p->prof_multiplier = 1;
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}
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/**
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* processor_probe - Determine if processor driver should claim this device.
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* @dev: The device which has been found.
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*
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* Determine if processor driver should claim this chip (return 0) or not
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* (return 1). If so, initialize the chip and tell other partners in crime
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* they have work to do.
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*/
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static int processor_probe(struct parisc_device *dev)
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{
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unsigned long txn_addr;
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unsigned long cpuid;
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struct cpuinfo_parisc *p;
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#ifdef CONFIG_SMP
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if (num_online_cpus() >= nr_cpu_ids) {
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printk(KERN_INFO "num_online_cpus() >= nr_cpu_ids\n");
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return 1;
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}
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#else
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if (boot_cpu_data.cpu_count > 0) {
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printk(KERN_INFO "CONFIG_SMP=n ignoring additional CPUs\n");
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return 1;
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}
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#endif
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/* logical CPU ID and update global counter
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* May get overwritten by PAT code.
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*/
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cpuid = boot_cpu_data.cpu_count;
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txn_addr = dev->hpa.start; /* for legacy PDC */
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#ifdef CONFIG_64BIT
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if (is_pdc_pat()) {
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ulong status;
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unsigned long bytecnt;
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pdc_pat_cell_mod_maddr_block_t *pa_pdc_cell;
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#undef USE_PAT_CPUID
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#ifdef USE_PAT_CPUID
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struct pdc_pat_cpu_num cpu_info;
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#endif
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pa_pdc_cell = kmalloc(sizeof (*pa_pdc_cell), GFP_KERNEL);
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if (!pa_pdc_cell)
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panic("couldn't allocate memory for PDC_PAT_CELL!");
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status = pdc_pat_cell_module(&bytecnt, dev->pcell_loc,
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dev->mod_index, PA_VIEW, pa_pdc_cell);
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BUG_ON(PDC_OK != status);
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/* verify it's the same as what do_pat_inventory() found */
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BUG_ON(dev->mod_info != pa_pdc_cell->mod_info);
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BUG_ON(dev->pmod_loc != pa_pdc_cell->mod_location);
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txn_addr = pa_pdc_cell->mod[0]; /* id_eid for IO sapic */
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kfree(pa_pdc_cell);
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#ifdef USE_PAT_CPUID
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/* We need contiguous numbers for cpuid. Firmware's notion
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* of cpuid is for physical CPUs and we just don't care yet.
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* We'll care when we need to query PAT PDC about a CPU *after*
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* boot time (ie shutdown a CPU from an OS perspective).
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*/
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/* get the cpu number */
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status = pdc_pat_cpu_get_number(&cpu_info, dev->hpa.start);
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BUG_ON(PDC_OK != status);
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if (cpu_info.cpu_num >= NR_CPUS) {
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printk(KERN_WARNING "IGNORING CPU at 0x%x,"
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" cpu_slot_id > NR_CPUS"
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" (%ld > %d)\n",
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dev->hpa.start, cpu_info.cpu_num, NR_CPUS);
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/* Ignore CPU since it will only crash */
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boot_cpu_data.cpu_count--;
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return 1;
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} else {
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cpuid = cpu_info.cpu_num;
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}
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#endif
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}
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#endif
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p = &per_cpu(cpu_data, cpuid);
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boot_cpu_data.cpu_count++;
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/* initialize counters - CPU 0 gets it_value set in time_init() */
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if (cpuid)
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memset(p, 0, sizeof(struct cpuinfo_parisc));
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p->loops_per_jiffy = loops_per_jiffy;
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p->dev = dev; /* Save IODC data in case we need it */
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p->hpa = dev->hpa.start; /* save CPU hpa */
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p->cpuid = cpuid; /* save CPU id */
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p->txn_addr = txn_addr; /* save CPU IRQ address */
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#ifdef CONFIG_SMP
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/*
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** FIXME: review if any other initialization is clobbered
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** for boot_cpu by the above memset().
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*/
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init_percpu_prof(cpuid);
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#endif
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/*
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** CONFIG_SMP: init_smp_config() will attempt to get CPUs into
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** OS control. RENDEZVOUS is the default state - see mem_set above.
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** p->state = STATE_RENDEZVOUS;
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*/
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#if 0
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/* CPU 0 IRQ table is statically allocated/initialized */
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if (cpuid) {
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struct irqaction actions[];
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/*
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** itimer and ipi IRQ handlers are statically initialized in
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** arch/parisc/kernel/irq.c. ie Don't need to register them.
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*/
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actions = kmalloc(sizeof(struct irqaction)*MAX_CPU_IRQ, GFP_ATOMIC);
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if (!actions) {
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/* not getting it's own table, share with monarch */
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actions = cpu_irq_actions[0];
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}
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cpu_irq_actions[cpuid] = actions;
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}
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#endif
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/*
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* Bring this CPU up now! (ignore bootstrap cpuid == 0)
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*/
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#ifdef CONFIG_SMP
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if (cpuid) {
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set_cpu_present(cpuid, true);
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cpu_up(cpuid);
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}
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#endif
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/* If we've registered more than one cpu,
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* we'll use the jiffies clocksource since cr16
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* is not synchronized between CPUs.
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*/
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update_cr16_clocksource();
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return 0;
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}
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/**
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* collect_boot_cpu_data - Fill the boot_cpu_data structure.
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*
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* This function collects and stores the generic processor information
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* in the boot_cpu_data structure.
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*/
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void __init collect_boot_cpu_data(void)
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{
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memset(&boot_cpu_data, 0, sizeof(boot_cpu_data));
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boot_cpu_data.cpu_hz = 100 * PAGE0->mem_10msec; /* Hz of this PARISC */
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/* get CPU-Model Information... */
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#define p ((unsigned long *)&boot_cpu_data.pdc.model)
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if (pdc_model_info(&boot_cpu_data.pdc.model) == PDC_OK)
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printk(KERN_INFO
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"model %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
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p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]);
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#undef p
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if (pdc_model_versions(&boot_cpu_data.pdc.versions, 0) == PDC_OK)
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printk(KERN_INFO "vers %08lx\n",
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boot_cpu_data.pdc.versions);
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if (pdc_model_cpuid(&boot_cpu_data.pdc.cpuid) == PDC_OK)
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printk(KERN_INFO "CPUID vers %ld rev %ld (0x%08lx)\n",
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(boot_cpu_data.pdc.cpuid >> 5) & 127,
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boot_cpu_data.pdc.cpuid & 31,
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boot_cpu_data.pdc.cpuid);
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if (pdc_model_capabilities(&boot_cpu_data.pdc.capabilities) == PDC_OK)
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printk(KERN_INFO "capabilities 0x%lx\n",
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boot_cpu_data.pdc.capabilities);
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if (pdc_model_sysmodel(boot_cpu_data.pdc.sys_model_name) == PDC_OK)
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printk(KERN_INFO "model %s\n",
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boot_cpu_data.pdc.sys_model_name);
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boot_cpu_data.hversion = boot_cpu_data.pdc.model.hversion;
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boot_cpu_data.sversion = boot_cpu_data.pdc.model.sversion;
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boot_cpu_data.cpu_type = parisc_get_cpu_type(boot_cpu_data.hversion);
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boot_cpu_data.cpu_name = cpu_name_version[boot_cpu_data.cpu_type][0];
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boot_cpu_data.family_name = cpu_name_version[boot_cpu_data.cpu_type][1];
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}
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/**
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* init_per_cpu - Handle individual processor initializations.
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* @cpunum: logical processor number.
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*
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* This function handles initialization for *every* CPU
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* in the system:
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*
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* o Set "default" CPU width for trap handlers
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*
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* o Enable FP coprocessor
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* REVISIT: this could be done in the "code 22" trap handler.
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* (frowands idea - that way we know which processes need FP
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* registers saved on the interrupt stack.)
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* NEWS FLASH: wide kernels need FP coprocessor enabled to handle
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* formatted printing of %lx for example (double divides I think)
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*
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* o Enable CPU profiling hooks.
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*/
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int init_per_cpu(int cpunum)
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{
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int ret;
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struct pdc_coproc_cfg coproc_cfg;
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set_firmware_width();
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ret = pdc_coproc_cfg(&coproc_cfg);
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if(ret >= 0 && coproc_cfg.ccr_functional) {
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mtctl(coproc_cfg.ccr_functional, 10); /* 10 == Coprocessor Control Reg */
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/* FWIW, FP rev/model is a more accurate way to determine
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** CPU type. CPU rev/model has some ambiguous cases.
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*/
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per_cpu(cpu_data, cpunum).fp_rev = coproc_cfg.revision;
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per_cpu(cpu_data, cpunum).fp_model = coproc_cfg.model;
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printk(KERN_INFO "FP[%d] enabled: Rev %ld Model %ld\n",
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cpunum, coproc_cfg.revision, coproc_cfg.model);
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/*
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** store status register to stack (hopefully aligned)
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** and clear the T-bit.
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*/
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asm volatile ("fstd %fr0,8(%sp)");
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} else {
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printk(KERN_WARNING "WARNING: No FP CoProcessor?!"
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" (coproc_cfg.ccr_functional == 0x%lx, expected 0xc0)\n"
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#ifdef CONFIG_64BIT
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"Halting Machine - FP required\n"
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#endif
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, coproc_cfg.ccr_functional);
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#ifdef CONFIG_64BIT
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mdelay(100); /* previous chars get pushed to console */
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panic("FP CoProc not reported");
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#endif
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}
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/* FUTURE: Enable Performance Monitor : ccr bit 0x20 */
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init_percpu_prof(cpunum);
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return ret;
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}
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/*
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* Display CPU info for all CPUs.
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*/
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int
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show_cpuinfo (struct seq_file *m, void *v)
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{
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unsigned long cpu;
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for_each_online_cpu(cpu) {
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const struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu);
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#ifdef CONFIG_SMP
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if (0 == cpuinfo->hpa)
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continue;
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#endif
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seq_printf(m, "processor\t: %lu\n"
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"cpu family\t: PA-RISC %s\n",
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cpu, boot_cpu_data.family_name);
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seq_printf(m, "cpu\t\t: %s\n", boot_cpu_data.cpu_name );
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/* cpu MHz */
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seq_printf(m, "cpu MHz\t\t: %d.%06d\n",
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boot_cpu_data.cpu_hz / 1000000,
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boot_cpu_data.cpu_hz % 1000000 );
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seq_printf(m, "capabilities\t:");
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if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS32)
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seq_puts(m, " os32");
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if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS64)
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seq_puts(m, " os64");
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if (boot_cpu_data.pdc.capabilities & PDC_MODEL_IOPDIR_FDC)
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seq_puts(m, " iopdir_fdc");
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switch (boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) {
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case PDC_MODEL_NVA_SUPPORTED:
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seq_puts(m, " nva_supported");
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break;
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case PDC_MODEL_NVA_SLOW:
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seq_puts(m, " nva_slow");
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break;
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case PDC_MODEL_NVA_UNSUPPORTED:
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seq_puts(m, " needs_equivalent_aliasing");
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break;
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}
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seq_printf(m, " (0x%02lx)\n", boot_cpu_data.pdc.capabilities);
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seq_printf(m, "model\t\t: %s\n"
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"model name\t: %s\n",
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boot_cpu_data.pdc.sys_model_name,
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cpuinfo->dev ?
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cpuinfo->dev->name : "Unknown");
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seq_printf(m, "hversion\t: 0x%08x\n"
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"sversion\t: 0x%08x\n",
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boot_cpu_data.hversion,
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boot_cpu_data.sversion );
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/* print cachesize info */
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show_cache_info(m);
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seq_printf(m, "bogomips\t: %lu.%02lu\n",
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cpuinfo->loops_per_jiffy / (500000 / HZ),
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(cpuinfo->loops_per_jiffy / (5000 / HZ)) % 100);
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seq_printf(m, "software id\t: %ld\n\n",
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boot_cpu_data.pdc.model.sw_id);
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}
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return 0;
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}
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static const struct parisc_device_id processor_tbl[] = {
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{ HPHW_NPROC, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, SVERSION_ANY_ID },
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{ 0, }
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};
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static struct parisc_driver cpu_driver = {
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.name = "CPU",
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.id_table = processor_tbl,
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.probe = processor_probe
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};
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/**
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* processor_init - Processor initialization procedure.
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*
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* Register this driver.
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*/
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void __init processor_init(void)
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{
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register_parisc_driver(&cpu_driver);
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}
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