104 lines
2.9 KiB
C
104 lines
2.9 KiB
C
/*
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* Copyright (C) 2012-2017 ARM Limited or its affiliates.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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/* \file ssi_hash.h
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* ARM CryptoCell Hash Crypto API
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*/
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#ifndef __SSI_HASH_H__
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#define __SSI_HASH_H__
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#include "ssi_buffer_mgr.h"
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#define HMAC_IPAD_CONST 0x36363636
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#define HMAC_OPAD_CONST 0x5C5C5C5C
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#if (DX_DEV_SHA_MAX > 256)
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#define HASH_LEN_SIZE 16
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#define SSI_MAX_HASH_DIGEST_SIZE SHA512_DIGEST_SIZE
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#define SSI_MAX_HASH_BLCK_SIZE SHA512_BLOCK_SIZE
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#else
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#define HASH_LEN_SIZE 8
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#define SSI_MAX_HASH_DIGEST_SIZE SHA256_DIGEST_SIZE
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#define SSI_MAX_HASH_BLCK_SIZE SHA256_BLOCK_SIZE
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#endif
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#define XCBC_MAC_K1_OFFSET 0
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#define XCBC_MAC_K2_OFFSET 16
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#define XCBC_MAC_K3_OFFSET 32
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#define CC_EXPORT_MAGIC 0xC2EE1070U
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// this struct was taken from drivers/crypto/nx/nx-aes-xcbc.c and it is used for xcbc/cmac statesize
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struct aeshash_state {
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u8 state[AES_BLOCK_SIZE];
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unsigned int count;
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u8 buffer[AES_BLOCK_SIZE];
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};
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/* ahash state */
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struct ahash_req_ctx {
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u8 *buff0;
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u8 *buff1;
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u8 *digest_result_buff;
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struct async_gen_req_ctx gen_ctx;
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enum ssi_req_dma_buf_type data_dma_buf_type;
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u8 *digest_buff;
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u8 *opad_digest_buff;
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u8 *digest_bytes_len;
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dma_addr_t opad_digest_dma_addr;
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dma_addr_t digest_buff_dma_addr;
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dma_addr_t digest_bytes_len_dma_addr;
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dma_addr_t digest_result_dma_addr;
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u32 buff0_cnt;
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u32 buff1_cnt;
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u32 buff_index;
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u32 xcbc_count; /* count xcbc update operatations */
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struct scatterlist buff_sg[2];
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struct scatterlist *curr_sg;
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u32 in_nents;
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u32 mlli_nents;
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struct mlli_params mlli_params;
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};
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int ssi_hash_alloc(struct ssi_drvdata *drvdata);
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int ssi_hash_init_sram_digest_consts(struct ssi_drvdata *drvdata);
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int ssi_hash_free(struct ssi_drvdata *drvdata);
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/*!
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* Gets the initial digest length
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*
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* \param drvdata
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* \param mode The Hash mode. Supported modes: MD5/SHA1/SHA224/SHA256/SHA384/SHA512
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*
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* \return u32 returns the address of the initial digest length in SRAM
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*/
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ssi_sram_addr_t
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ssi_ahash_get_initial_digest_len_sram_addr(void *drvdata, u32 mode);
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/*!
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* Gets the address of the initial digest in SRAM
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* according to the given hash mode
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*
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* \param drvdata
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* \param mode The Hash mode. Supported modes: MD5/SHA1/SHA224/SHA256/SHA384/SHA512
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*
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* \return u32 The address of the inital digest in SRAM
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*/
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ssi_sram_addr_t ssi_ahash_get_larval_digest_sram_addr(void *drvdata, u32 mode);
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#endif /*__SSI_HASH_H__*/
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