4d22de3e6c
This driver is required by the Chelsio T3 RDMA driver posted by Steve Wise. Signed-off-by: Divy Le Ray <divy@chelsio.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
144 lines
4.8 KiB
C
144 lines
4.8 KiB
C
/*
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* Copyright (c) 2006 Chelsio, Inc. All rights reserved.
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* Copyright (c) 2006 Open Grid Computing, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef _CHELSIO_L2T_H
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#define _CHELSIO_L2T_H
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#include <linux/spinlock.h>
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#include "t3cdev.h"
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#include <asm/atomic.h>
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enum {
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L2T_STATE_VALID, /* entry is up to date */
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L2T_STATE_STALE, /* entry may be used but needs revalidation */
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L2T_STATE_RESOLVING, /* entry needs address resolution */
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L2T_STATE_UNUSED /* entry not in use */
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};
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struct neighbour;
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struct sk_buff;
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/*
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* Each L2T entry plays multiple roles. First of all, it keeps state for the
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* corresponding entry of the HW L2 table and maintains a queue of offload
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* packets awaiting address resolution. Second, it is a node of a hash table
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* chain, where the nodes of the chain are linked together through their next
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* pointer. Finally, each node is a bucket of a hash table, pointing to the
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* first element in its chain through its first pointer.
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*/
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struct l2t_entry {
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u16 state; /* entry state */
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u16 idx; /* entry index */
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u32 addr; /* dest IP address */
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int ifindex; /* neighbor's net_device's ifindex */
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u16 smt_idx; /* SMT index */
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u16 vlan; /* VLAN TCI (id: bits 0-11, prio: 13-15 */
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struct neighbour *neigh; /* associated neighbour */
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struct l2t_entry *first; /* start of hash chain */
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struct l2t_entry *next; /* next l2t_entry on chain */
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struct sk_buff *arpq_head; /* queue of packets awaiting resolution */
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struct sk_buff *arpq_tail;
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spinlock_t lock;
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atomic_t refcnt; /* entry reference count */
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u8 dmac[6]; /* neighbour's MAC address */
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};
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struct l2t_data {
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unsigned int nentries; /* number of entries */
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struct l2t_entry *rover; /* starting point for next allocation */
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atomic_t nfree; /* number of free entries */
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rwlock_t lock;
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struct l2t_entry l2tab[0];
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};
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typedef void (*arp_failure_handler_func)(struct t3cdev * dev,
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struct sk_buff * skb);
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/*
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* Callback stored in an skb to handle address resolution failure.
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*/
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struct l2t_skb_cb {
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arp_failure_handler_func arp_failure_handler;
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};
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#define L2T_SKB_CB(skb) ((struct l2t_skb_cb *)(skb)->cb)
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static inline void set_arp_failure_handler(struct sk_buff *skb,
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arp_failure_handler_func hnd)
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{
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L2T_SKB_CB(skb)->arp_failure_handler = hnd;
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}
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/*
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* Getting to the L2 data from an offload device.
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*/
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#define L2DATA(dev) ((dev)->l2opt)
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#define W_TCB_L2T_IX 0
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#define S_TCB_L2T_IX 7
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#define M_TCB_L2T_IX 0x7ffULL
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#define V_TCB_L2T_IX(x) ((x) << S_TCB_L2T_IX)
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void t3_l2e_free(struct l2t_data *d, struct l2t_entry *e);
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void t3_l2t_update(struct t3cdev *dev, struct neighbour *neigh);
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struct l2t_entry *t3_l2t_get(struct t3cdev *cdev, struct neighbour *neigh,
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struct net_device *dev);
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int t3_l2t_send_slow(struct t3cdev *dev, struct sk_buff *skb,
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struct l2t_entry *e);
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void t3_l2t_send_event(struct t3cdev *dev, struct l2t_entry *e);
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struct l2t_data *t3_init_l2t(unsigned int l2t_capacity);
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void t3_free_l2t(struct l2t_data *d);
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int cxgb3_ofld_send(struct t3cdev *dev, struct sk_buff *skb);
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static inline int l2t_send(struct t3cdev *dev, struct sk_buff *skb,
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struct l2t_entry *e)
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{
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if (likely(e->state == L2T_STATE_VALID))
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return cxgb3_ofld_send(dev, skb);
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return t3_l2t_send_slow(dev, skb, e);
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}
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static inline void l2t_release(struct l2t_data *d, struct l2t_entry *e)
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{
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if (atomic_dec_and_test(&e->refcnt))
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t3_l2e_free(d, e);
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}
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static inline void l2t_hold(struct l2t_data *d, struct l2t_entry *e)
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{
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if (atomic_add_return(1, &e->refcnt) == 1) /* 0 -> 1 transition */
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atomic_dec(&d->nfree);
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}
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#endif
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