612a9aab56
Pull drm merge (part 1) from Dave Airlie: "So first of all my tree and uapi stuff has a conflict mess, its my fault as the nouveau stuff didn't hit -next as were trying to rebase regressions out of it before we merged. Highlights: - SH mobile modesetting driver and associated helpers - some DRM core documentation - i915 modesetting rework, haswell hdmi, haswell and vlv fixes, write combined pte writing, ilk rc6 support, - nouveau: major driver rework into a hw core driver, makes features like SLI a lot saner to implement, - psb: add eDP/DP support for Cedarview - radeon: 2 layer page tables, async VM pte updates, better PLL selection for > 2 screens, better ACPI interactions The rest is general grab bag of fixes. So why part 1? well I have the exynos pull req which came in a bit late but was waiting for me to do something they shouldn't have and it looks fairly safe, and David Howells has some more header cleanups he'd like me to pull, that seem like a good idea, but I'd like to get this merge out of the way so -next dosen't get blocked." Tons of conflicts mostly due to silly include line changes, but mostly mindless. A few other small semantic conflicts too, noted from Dave's pre-merged branch. * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (447 commits) drm/nv98/crypt: fix fuc build with latest envyas drm/nouveau/devinit: fixup various issues with subdev ctor/init ordering drm/nv41/vm: fix and enable use of "real" pciegart drm/nv44/vm: fix and enable use of "real" pciegart drm/nv04/dmaobj: fixup vm target handling in preparation for nv4x pcie drm/nouveau: store supported dma mask in vmmgr drm/nvc0/ibus: initial implementation of subdev drm/nouveau/therm: add support for fan-control modes drm/nouveau/hwmon: rename pwm0* to pmw1* to follow hwmon's rules drm/nouveau/therm: calculate the pwm divisor on nv50+ drm/nouveau/fan: rewrite the fan tachometer driver to get more precision, faster drm/nouveau/therm: move thermal-related functions to the therm subdev drm/nouveau/bios: parse the pwm divisor from the perf table drm/nouveau/therm: use the EXTDEV table to detect i2c monitoring devices drm/nouveau/therm: rework thermal table parsing drm/nouveau/gpio: expose the PWM/TOGGLE parameter found in the gpio vbios table drm/nouveau: fix pm initialization order drm/nouveau/bios: check that fixed tvdac gpio data is valid before using it drm/nouveau: log channel debug/error messages from client object rather than drm client drm/nouveau: have drm debugging macros build on top of core macros ...
417 lines
10 KiB
C
417 lines
10 KiB
C
/*
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* Copyright 2010 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include <drm/drmP.h>
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#include "nouveau_drm.h"
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#include "nouveau_reg.h"
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#include "nouveau_pm.h"
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static u8 *
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nouveau_perf_table(struct drm_device *dev, u8 *ver)
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{
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struct nouveau_drm *drm = nouveau_drm(dev);
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struct nvbios *bios = &drm->vbios;
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struct bit_entry P;
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if (!bit_table(dev, 'P', &P) && P.version && P.version <= 2) {
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u8 *perf = ROMPTR(dev, P.data[0]);
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if (perf) {
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*ver = perf[0];
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return perf;
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}
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}
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if (bios->type == NVBIOS_BMP) {
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if (bios->data[bios->offset + 6] >= 0x25) {
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u8 *perf = ROMPTR(dev, bios->data[bios->offset + 0x94]);
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if (perf) {
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*ver = perf[1];
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return perf;
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}
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}
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}
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return NULL;
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}
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static u8 *
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nouveau_perf_entry(struct drm_device *dev, int idx,
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u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
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{
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u8 *perf = nouveau_perf_table(dev, ver);
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if (perf) {
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if (*ver >= 0x12 && *ver < 0x20 && idx < perf[2]) {
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*hdr = perf[3];
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*cnt = 0;
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*len = 0;
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return perf + perf[0] + idx * perf[3];
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} else
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if (*ver >= 0x20 && *ver < 0x40 && idx < perf[2]) {
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*hdr = perf[3];
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*cnt = perf[4];
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*len = perf[5];
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return perf + perf[1] + idx * (*hdr + (*cnt * *len));
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} else
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if (*ver >= 0x40 && *ver < 0x41 && idx < perf[5]) {
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*hdr = perf[2];
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*cnt = perf[4];
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*len = perf[3];
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return perf + perf[1] + idx * (*hdr + (*cnt * *len));
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}
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}
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return NULL;
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}
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u8 *
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nouveau_perf_rammap(struct drm_device *dev, u32 freq,
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u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
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{
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struct nouveau_drm *drm = nouveau_drm(dev);
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struct bit_entry P;
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u8 *perf, i = 0;
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if (!bit_table(dev, 'P', &P) && P.version == 2) {
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u8 *rammap = ROMPTR(dev, P.data[4]);
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if (rammap) {
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u8 *ramcfg = rammap + rammap[1];
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*ver = rammap[0];
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*hdr = rammap[2];
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*cnt = rammap[4];
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*len = rammap[3];
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freq /= 1000;
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for (i = 0; i < rammap[5]; i++) {
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if (freq >= ROM16(ramcfg[0]) &&
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freq <= ROM16(ramcfg[2]))
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return ramcfg;
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ramcfg += *hdr + (*cnt * *len);
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}
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}
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return NULL;
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}
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if (nv_device(drm->device)->chipset == 0x49 ||
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nv_device(drm->device)->chipset == 0x4b)
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freq /= 2;
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while ((perf = nouveau_perf_entry(dev, i++, ver, hdr, cnt, len))) {
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if (*ver >= 0x20 && *ver < 0x25) {
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if (perf[0] != 0xff && freq <= ROM16(perf[11]) * 1000)
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break;
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} else
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if (*ver >= 0x25 && *ver < 0x40) {
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if (perf[0] != 0xff && freq <= ROM16(perf[12]) * 1000)
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break;
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}
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}
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if (perf) {
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u8 *ramcfg = perf + *hdr;
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*ver = 0x00;
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*hdr = 0;
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return ramcfg;
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}
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return NULL;
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}
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u8 *
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nouveau_perf_ramcfg(struct drm_device *dev, u32 freq, u8 *ver, u8 *len)
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{
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struct nouveau_device *device = nouveau_dev(dev);
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struct nouveau_drm *drm = nouveau_drm(dev);
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struct nvbios *bios = &drm->vbios;
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u8 strap, hdr, cnt;
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u8 *rammap;
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strap = (nv_rd32(device, 0x101000) & 0x0000003c) >> 2;
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if (bios->ram_restrict_tbl_ptr)
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strap = bios->data[bios->ram_restrict_tbl_ptr + strap];
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rammap = nouveau_perf_rammap(dev, freq, ver, &hdr, &cnt, len);
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if (rammap && strap < cnt)
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return rammap + hdr + (strap * *len);
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return NULL;
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}
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u8 *
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nouveau_perf_timing(struct drm_device *dev, u32 freq, u8 *ver, u8 *len)
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{
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struct nouveau_drm *drm = nouveau_drm(dev);
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struct nvbios *bios = &drm->vbios;
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struct bit_entry P;
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u8 *perf, *timing = NULL;
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u8 i = 0, hdr, cnt;
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if (bios->type == NVBIOS_BMP) {
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while ((perf = nouveau_perf_entry(dev, i++, ver, &hdr, &cnt,
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len)) && *ver == 0x15) {
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if (freq <= ROM32(perf[5]) * 20) {
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*ver = 0x00;
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*len = 14;
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return perf + 41;
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}
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}
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return NULL;
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}
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if (!bit_table(dev, 'P', &P)) {
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if (P.version == 1)
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timing = ROMPTR(dev, P.data[4]);
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else
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if (P.version == 2)
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timing = ROMPTR(dev, P.data[8]);
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}
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if (timing && timing[0] == 0x10) {
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u8 *ramcfg = nouveau_perf_ramcfg(dev, freq, ver, len);
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if (ramcfg && ramcfg[1] < timing[2]) {
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*ver = timing[0];
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*len = timing[3];
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return timing + timing[1] + (ramcfg[1] * timing[3]);
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}
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}
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return NULL;
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}
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static void
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legacy_perf_init(struct drm_device *dev)
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{
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struct nouveau_device *device = nouveau_dev(dev);
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struct nouveau_drm *drm = nouveau_drm(dev);
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struct nvbios *bios = &drm->vbios;
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struct nouveau_pm *pm = nouveau_pm(dev);
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char *perf, *entry, *bmp = &bios->data[bios->offset];
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int headerlen, use_straps;
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if (bmp[5] < 0x5 || bmp[6] < 0x14) {
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NV_DEBUG(drm, "BMP version too old for perf\n");
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return;
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}
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perf = ROMPTR(dev, bmp[0x73]);
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if (!perf) {
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NV_DEBUG(drm, "No memclock table pointer found.\n");
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return;
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}
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switch (perf[0]) {
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case 0x12:
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case 0x14:
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case 0x18:
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use_straps = 0;
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headerlen = 1;
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break;
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case 0x01:
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use_straps = perf[1] & 1;
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headerlen = (use_straps ? 8 : 2);
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break;
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default:
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NV_WARN(drm, "Unknown memclock table version %x.\n", perf[0]);
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return;
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}
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entry = perf + headerlen;
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if (use_straps)
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entry += (nv_rd32(device, NV_PEXTDEV_BOOT_0) & 0x3c) >> 1;
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sprintf(pm->perflvl[0].name, "performance_level_0");
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pm->perflvl[0].memory = ROM16(entry[0]) * 20;
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pm->nr_perflvl = 1;
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}
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static void
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nouveau_perf_voltage(struct drm_device *dev, struct nouveau_pm_level *perflvl)
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{
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struct nouveau_drm *drm = nouveau_drm(dev);
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struct bit_entry P;
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u8 *vmap;
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int id;
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id = perflvl->volt_min;
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perflvl->volt_min = 0;
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/* boards using voltage table version <0x40 store the voltage
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* level directly in the perflvl entry as a multiple of 10mV
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*/
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if (drm->pm->voltage.version < 0x40) {
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perflvl->volt_min = id * 10000;
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perflvl->volt_max = perflvl->volt_min;
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return;
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}
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/* on newer ones, the perflvl stores an index into yet another
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* vbios table containing a min/max voltage value for the perflvl
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*/
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if (bit_table(dev, 'P', &P) || P.version != 2 || P.length < 34) {
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NV_DEBUG(drm, "where's our volt map table ptr? %d %d\n",
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P.version, P.length);
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return;
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}
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vmap = ROMPTR(dev, P.data[32]);
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if (!vmap) {
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NV_DEBUG(drm, "volt map table pointer invalid\n");
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return;
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}
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if (id < vmap[3]) {
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vmap += vmap[1] + (vmap[2] * id);
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perflvl->volt_min = ROM32(vmap[0]);
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perflvl->volt_max = ROM32(vmap[4]);
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}
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}
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void
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nouveau_perf_init(struct drm_device *dev)
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{
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struct nouveau_drm *drm = nouveau_drm(dev);
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struct nouveau_pm *pm = nouveau_pm(dev);
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struct nvbios *bios = &drm->vbios;
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u8 *perf, ver, hdr, cnt, len;
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int ret, vid, i = -1;
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if (bios->type == NVBIOS_BMP && bios->data[bios->offset + 6] < 0x25) {
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legacy_perf_init(dev);
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return;
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}
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perf = nouveau_perf_table(dev, &ver);
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while ((perf = nouveau_perf_entry(dev, ++i, &ver, &hdr, &cnt, &len))) {
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struct nouveau_pm_level *perflvl = &pm->perflvl[pm->nr_perflvl];
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if (perf[0] == 0xff)
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continue;
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switch (ver) {
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case 0x12:
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case 0x13:
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case 0x15:
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perflvl->fanspeed = perf[55];
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if (hdr > 56)
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perflvl->volt_min = perf[56];
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perflvl->core = ROM32(perf[1]) * 10;
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perflvl->memory = ROM32(perf[5]) * 20;
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break;
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case 0x21:
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case 0x23:
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case 0x24:
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perflvl->fanspeed = perf[4];
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perflvl->volt_min = perf[5];
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perflvl->shader = ROM16(perf[6]) * 1000;
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perflvl->core = perflvl->shader;
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perflvl->core += (signed char)perf[8] * 1000;
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if (nv_device(drm->device)->chipset == 0x49 ||
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nv_device(drm->device)->chipset == 0x4b)
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perflvl->memory = ROM16(perf[11]) * 1000;
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else
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perflvl->memory = ROM16(perf[11]) * 2000;
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break;
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case 0x25:
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perflvl->fanspeed = perf[4];
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perflvl->volt_min = perf[5];
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perflvl->core = ROM16(perf[6]) * 1000;
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perflvl->shader = ROM16(perf[10]) * 1000;
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perflvl->memory = ROM16(perf[12]) * 1000;
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break;
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case 0x30:
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perflvl->memscript = ROM16(perf[2]);
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case 0x35:
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perflvl->fanspeed = perf[6];
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perflvl->volt_min = perf[7];
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perflvl->core = ROM16(perf[8]) * 1000;
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perflvl->shader = ROM16(perf[10]) * 1000;
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perflvl->memory = ROM16(perf[12]) * 1000;
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perflvl->vdec = ROM16(perf[16]) * 1000;
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perflvl->dom6 = ROM16(perf[20]) * 1000;
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break;
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case 0x40:
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#define subent(n) ((ROM16(perf[hdr + (n) * len]) & 0xfff) * 1000)
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perflvl->fanspeed = 0; /*XXX*/
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perflvl->volt_min = perf[2];
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if (nv_device(drm->device)->card_type == NV_50) {
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perflvl->core = subent(0);
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perflvl->shader = subent(1);
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perflvl->memory = subent(2);
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perflvl->vdec = subent(3);
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perflvl->unka0 = subent(4);
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} else {
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perflvl->hub06 = subent(0);
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perflvl->hub01 = subent(1);
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perflvl->copy = subent(2);
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perflvl->shader = subent(3);
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perflvl->rop = subent(4);
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perflvl->memory = subent(5);
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perflvl->vdec = subent(6);
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perflvl->daemon = subent(10);
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perflvl->hub07 = subent(11);
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perflvl->core = perflvl->shader / 2;
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}
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break;
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}
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/* make sure vid is valid */
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nouveau_perf_voltage(dev, perflvl);
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if (pm->voltage.supported && perflvl->volt_min) {
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vid = nouveau_volt_vid_lookup(dev, perflvl->volt_min);
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if (vid < 0) {
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NV_DEBUG(drm, "perflvl %d, bad vid\n", i);
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continue;
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}
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}
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/* get the corresponding memory timings */
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ret = nouveau_mem_timing_calc(dev, perflvl->memory,
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&perflvl->timing);
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if (ret) {
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NV_DEBUG(drm, "perflvl %d, bad timing: %d\n", i, ret);
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continue;
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}
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snprintf(perflvl->name, sizeof(perflvl->name),
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"performance_level_%d", i);
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perflvl->id = i;
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snprintf(perflvl->profile.name, sizeof(perflvl->profile.name),
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"%d", perflvl->id);
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perflvl->profile.func = &nouveau_pm_static_profile_func;
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list_add_tail(&perflvl->profile.head, &pm->profiles);
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pm->nr_perflvl++;
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}
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}
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void
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nouveau_perf_fini(struct drm_device *dev)
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{
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}
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