acbcd26319
signef-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
787 lines
19 KiB
C
787 lines
19 KiB
C
/*
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* File: drivers/video/bf54x-lq043.c
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* Based on:
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* Author: Michael Hennerich <hennerich@blackfin.uclinux.org>
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*
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* Created:
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* Description: ADSP-BF54x Framebufer driver
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*
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*
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* Modified:
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* Copyright 2004-2007 Analog Devices Inc.
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*
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see the file COPYING, or write
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* to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/tty.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/fb.h>
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/sched.h>
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#include <linux/timer.h>
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#include <linux/device.h>
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#include <linux/backlight.h>
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#include <linux/lcd.h>
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#include <linux/spinlock.h>
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#include <linux/dma-mapping.h>
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#include <linux/platform_device.h>
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#include <asm/blackfin.h>
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#include <asm/irq.h>
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#include <asm/dpmc.h>
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#include <asm/dma-mapping.h>
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#include <asm/dma.h>
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#include <asm/gpio.h>
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#include <asm/portmux.h>
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#include <asm/mach/bf54x-lq043.h>
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#define NO_BL_SUPPORT
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#define DRIVER_NAME "bf54x-lq043"
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static char driver_name[] = DRIVER_NAME;
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#define BFIN_LCD_NBR_PALETTE_ENTRIES 256
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#define EPPI0_18 {P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2, P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3, \
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P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7, P_PPI0_D8, P_PPI0_D9, P_PPI0_D10, \
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P_PPI0_D11, P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, P_PPI0_D15, P_PPI0_D16, P_PPI0_D17, 0}
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#define EPPI0_24 {P_PPI0_D18, P_PPI0_D19, P_PPI0_D20, P_PPI0_D21, P_PPI0_D22, P_PPI0_D23, 0}
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struct bfin_bf54xfb_info {
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struct fb_info *fb;
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struct device *dev;
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struct bfin_bf54xfb_mach_info *mach_info;
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unsigned char *fb_buffer; /* RGB Buffer */
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dma_addr_t dma_handle;
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int lq043_mmap;
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int lq043_open_cnt;
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int irq;
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spinlock_t lock; /* lock */
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};
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static int nocursor;
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module_param(nocursor, int, 0644);
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MODULE_PARM_DESC(nocursor, "cursor enable/disable");
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static int outp_rgb666;
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module_param(outp_rgb666, int, 0);
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MODULE_PARM_DESC(outp_rgb666, "Output 18-bit RGB666");
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#define LCD_X_RES 480 /*Horizontal Resolution */
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#define LCD_Y_RES 272 /* Vertical Resolution */
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#define LCD_BPP 24 /* Bit Per Pixel */
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#define DMA_BUS_SIZE 32
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/* -- Horizontal synchronizing --
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*
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* Timing characteristics taken from the SHARP LQ043T1DG01 datasheet
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* (LCY-W-06602A Page 9 of 22)
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*
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* Clock Frequency 1/Tc Min 7.83 Typ 9.00 Max 9.26 MHz
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*
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* Period TH - 525 - Clock
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* Pulse width THp - 41 - Clock
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* Horizontal period THd - 480 - Clock
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* Back porch THb - 2 - Clock
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* Front porch THf - 2 - Clock
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*
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* -- Vertical synchronizing --
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* Period TV - 286 - Line
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* Pulse width TVp - 10 - Line
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* Vertical period TVd - 272 - Line
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* Back porch TVb - 2 - Line
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* Front porch TVf - 2 - Line
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*/
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#define LCD_CLK (8*1000*1000) /* 8MHz */
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/* # active data to transfer after Horizontal Delay clock */
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#define EPPI_HCOUNT LCD_X_RES
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/* # active lines to transfer after Vertical Delay clock */
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#define EPPI_VCOUNT LCD_Y_RES
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/* Samples per Line = 480 (active data) + 45 (padding) */
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#define EPPI_LINE 525
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/* Lines per Frame = 272 (active data) + 14 (padding) */
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#define EPPI_FRAME 286
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/* FS1 (Hsync) Width (Typical)*/
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#define EPPI_FS1W_HBL 41
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/* FS1 (Hsync) Period (Typical) */
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#define EPPI_FS1P_AVPL EPPI_LINE
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/* Horizontal Delay clock after assertion of Hsync (Typical) */
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#define EPPI_HDELAY 43
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/* FS2 (Vsync) Width = FS1 (Hsync) Period * 10 */
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#define EPPI_FS2W_LVB (EPPI_LINE * 10)
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/* FS2 (Vsync) Period = FS1 (Hsync) Period * Lines per Frame */
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#define EPPI_FS2P_LAVF (EPPI_LINE * EPPI_FRAME)
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/* Vertical Delay after assertion of Vsync (2 Lines) */
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#define EPPI_VDELAY 12
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#define EPPI_CLIP 0xFF00FF00
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/* EPPI Control register configuration value for RGB out
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* - EPPI as Output
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* GP 2 frame sync mode,
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* Internal Clock generation disabled, Internal FS generation enabled,
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* Receives samples on EPPI_CLK raising edge, Transmits samples on EPPI_CLK falling edge,
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* FS1 & FS2 are active high,
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* DLEN = 6 (24 bits for RGB888 out) or 5 (18 bits for RGB666 out)
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* DMA Unpacking disabled when RGB Formating is enabled, otherwise DMA unpacking enabled
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* Swapping Enabled,
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* One (DMA) Channel Mode,
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* RGB Formatting Enabled for RGB666 output, disabled for RGB888 output
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* Regular watermark - when FIFO is 100% full,
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* Urgent watermark - when FIFO is 75% full
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*/
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#define EPPI_CONTROL (0x20136E2E | SWAPEN)
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static inline u16 get_eppi_clkdiv(u32 target_ppi_clk)
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{
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u32 sclk = get_sclk();
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/* EPPI_CLK = (SCLK) / (2 * (EPPI_CLKDIV[15:0] + 1)) */
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return (((sclk / target_ppi_clk) / 2) - 1);
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}
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static void config_ppi(struct bfin_bf54xfb_info *fbi)
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{
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u16 eppi_clkdiv = get_eppi_clkdiv(LCD_CLK);
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bfin_write_EPPI0_FS1W_HBL(EPPI_FS1W_HBL);
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bfin_write_EPPI0_FS1P_AVPL(EPPI_FS1P_AVPL);
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bfin_write_EPPI0_FS2W_LVB(EPPI_FS2W_LVB);
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bfin_write_EPPI0_FS2P_LAVF(EPPI_FS2P_LAVF);
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bfin_write_EPPI0_CLIP(EPPI_CLIP);
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bfin_write_EPPI0_FRAME(EPPI_FRAME);
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bfin_write_EPPI0_LINE(EPPI_LINE);
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bfin_write_EPPI0_HCOUNT(EPPI_HCOUNT);
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bfin_write_EPPI0_HDELAY(EPPI_HDELAY);
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bfin_write_EPPI0_VCOUNT(EPPI_VCOUNT);
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bfin_write_EPPI0_VDELAY(EPPI_VDELAY);
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bfin_write_EPPI0_CLKDIV(eppi_clkdiv);
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/*
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* DLEN = 6 (24 bits for RGB888 out) or 5 (18 bits for RGB666 out)
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* RGB Formatting Enabled for RGB666 output, disabled for RGB888 output
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*/
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if (outp_rgb666)
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bfin_write_EPPI0_CONTROL((EPPI_CONTROL & ~DLENGTH) | DLEN_18 |
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RGB_FMT_EN);
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else
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bfin_write_EPPI0_CONTROL(((EPPI_CONTROL & ~DLENGTH) | DLEN_24) &
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~RGB_FMT_EN);
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}
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static int config_dma(struct bfin_bf54xfb_info *fbi)
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{
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set_dma_config(CH_EPPI0,
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set_bfin_dma_config(DIR_READ, DMA_FLOW_AUTO,
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INTR_DISABLE, DIMENSION_2D,
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DATA_SIZE_32,
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DMA_NOSYNC_KEEP_DMA_BUF));
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set_dma_x_count(CH_EPPI0, (LCD_X_RES * LCD_BPP) / DMA_BUS_SIZE);
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set_dma_x_modify(CH_EPPI0, DMA_BUS_SIZE / 8);
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set_dma_y_count(CH_EPPI0, LCD_Y_RES);
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set_dma_y_modify(CH_EPPI0, DMA_BUS_SIZE / 8);
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set_dma_start_addr(CH_EPPI0, (unsigned long)fbi->fb_buffer);
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return 0;
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}
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static int request_ports(struct bfin_bf54xfb_info *fbi)
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{
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u16 eppi_req_18[] = EPPI0_18;
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u16 disp = fbi->mach_info->disp;
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if (gpio_request(disp, NULL)) {
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printk(KERN_ERR "Requesting GPIO %d faild\n", disp);
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return -EFAULT;
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}
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if (peripheral_request_list(eppi_req_18, DRIVER_NAME)) {
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printk(KERN_ERR "Requesting Peripherals faild\n");
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gpio_free(disp);
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return -EFAULT;
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}
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if (!outp_rgb666) {
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u16 eppi_req_24[] = EPPI0_24;
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if (peripheral_request_list(eppi_req_24, DRIVER_NAME)) {
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printk(KERN_ERR "Requesting Peripherals faild\n");
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peripheral_free_list(eppi_req_18);
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gpio_free(disp);
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return -EFAULT;
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}
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}
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gpio_direction_output(disp, 1);
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return 0;
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}
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static void free_ports(struct bfin_bf54xfb_info *fbi)
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{
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u16 eppi_req_18[] = EPPI0_18;
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gpio_free(fbi->mach_info->disp);
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peripheral_free_list(eppi_req_18);
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if (!outp_rgb666) {
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u16 eppi_req_24[] = EPPI0_24;
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peripheral_free_list(eppi_req_24);
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}
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}
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static int bfin_bf54x_fb_open(struct fb_info *info, int user)
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{
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struct bfin_bf54xfb_info *fbi = info->par;
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spin_lock(&fbi->lock);
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fbi->lq043_open_cnt++;
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if (fbi->lq043_open_cnt <= 1) {
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bfin_write_EPPI0_CONTROL(0);
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SSYNC();
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config_dma(fbi);
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config_ppi(fbi);
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/* start dma */
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enable_dma(CH_EPPI0);
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bfin_write_EPPI0_CONTROL(bfin_read_EPPI0_CONTROL() | EPPI_EN);
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}
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spin_unlock(&fbi->lock);
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return 0;
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}
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static int bfin_bf54x_fb_release(struct fb_info *info, int user)
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{
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struct bfin_bf54xfb_info *fbi = info->par;
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spin_lock(&fbi->lock);
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fbi->lq043_open_cnt--;
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fbi->lq043_mmap = 0;
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if (fbi->lq043_open_cnt <= 0) {
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bfin_write_EPPI0_CONTROL(0);
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SSYNC();
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disable_dma(CH_EPPI0);
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memset(fbi->fb_buffer, 0, info->fix.smem_len);
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}
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spin_unlock(&fbi->lock);
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return 0;
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}
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static int bfin_bf54x_fb_check_var(struct fb_var_screeninfo *var,
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struct fb_info *info)
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{
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if (var->bits_per_pixel != LCD_BPP) {
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pr_debug("%s: depth not supported: %u BPP\n", __FUNCTION__,
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var->bits_per_pixel);
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return -EINVAL;
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}
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if (info->var.xres != var->xres || info->var.yres != var->yres ||
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info->var.xres_virtual != var->xres_virtual ||
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info->var.yres_virtual != var->yres_virtual) {
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pr_debug("%s: Resolution not supported: X%u x Y%u \n",
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__FUNCTION__, var->xres, var->yres);
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return -EINVAL;
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}
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/*
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* Memory limit
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*/
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if ((info->fix.line_length * var->yres_virtual) > info->fix.smem_len) {
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pr_debug("%s: Memory Limit requested yres_virtual = %u\n",
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__FUNCTION__, var->yres_virtual);
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return -ENOMEM;
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}
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return 0;
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}
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static int bfin_bf54x_fb_mmap(struct fb_info *info, struct vm_area_struct *vma)
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{
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struct bfin_bf54xfb_info *fbi = info->par;
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if (fbi->lq043_mmap)
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return -1;
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spin_lock(&fbi->lock);
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fbi->lq043_mmap = 1;
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spin_unlock(&fbi->lock);
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vma->vm_start = (unsigned long)(fbi->fb_buffer);
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vma->vm_end = vma->vm_start + info->fix.smem_len;
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/* For those who don't understand how mmap works, go read
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* Documentation/nommu-mmap.txt.
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* For those that do, you will know that the VM_MAYSHARE flag
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* must be set in the vma->vm_flags structure on noMMU
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* Other flags can be set, and are documented in
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* include/linux/mm.h
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*/
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vma->vm_flags |= VM_MAYSHARE;
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return 0;
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}
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int bfin_bf54x_fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
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{
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if (nocursor)
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return 0;
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else
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return -EINVAL; /* just to force soft_cursor() call */
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}
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static int bfin_bf54x_fb_setcolreg(u_int regno, u_int red, u_int green,
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u_int blue, u_int transp,
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struct fb_info *info)
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{
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if (regno >= BFIN_LCD_NBR_PALETTE_ENTRIES)
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return -EINVAL;
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if (info->var.grayscale) {
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/* grayscale = 0.30*R + 0.59*G + 0.11*B */
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red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
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}
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if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
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u32 value;
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/* Place color in the pseudopalette */
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if (regno > 16)
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return -EINVAL;
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red >>= (16 - info->var.red.length);
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green >>= (16 - info->var.green.length);
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blue >>= (16 - info->var.blue.length);
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value = (red << info->var.red.offset) |
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(green << info->var.green.offset) |
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(blue << info->var.blue.offset);
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value &= 0xFFFFFF;
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((u32 *) (info->pseudo_palette))[regno] = value;
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}
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return 0;
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}
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static struct fb_ops bfin_bf54x_fb_ops = {
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.owner = THIS_MODULE,
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.fb_open = bfin_bf54x_fb_open,
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.fb_release = bfin_bf54x_fb_release,
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.fb_check_var = bfin_bf54x_fb_check_var,
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.fb_fillrect = cfb_fillrect,
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.fb_copyarea = cfb_copyarea,
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.fb_imageblit = cfb_imageblit,
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.fb_mmap = bfin_bf54x_fb_mmap,
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.fb_cursor = bfin_bf54x_fb_cursor,
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.fb_setcolreg = bfin_bf54x_fb_setcolreg,
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};
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#ifndef NO_BL_SUPPORT
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static int bl_get_brightness(struct backlight_device *bd)
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{
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return 0;
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}
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static struct backlight_ops bfin_lq043fb_bl_ops = {
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.get_brightness = bl_get_brightness,
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};
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static struct backlight_device *bl_dev;
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static int bfin_lcd_get_power(struct lcd_device *dev)
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{
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return 0;
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}
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static int bfin_lcd_set_power(struct lcd_device *dev, int power)
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{
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return 0;
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}
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static int bfin_lcd_get_contrast(struct lcd_device *dev)
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{
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return 0;
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}
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static int bfin_lcd_set_contrast(struct lcd_device *dev, int contrast)
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{
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return 0;
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}
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static int bfin_lcd_check_fb(struct fb_info *fi)
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{
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if (!fi || (fi == &bfin_bf54x_fb))
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return 1;
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return 0;
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}
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static struct lcd_ops bfin_lcd_ops = {
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.get_power = bfin_lcd_get_power,
|
|
.set_power = bfin_lcd_set_power,
|
|
.get_contrast = bfin_lcd_get_contrast,
|
|
.set_contrast = bfin_lcd_set_contrast,
|
|
.check_fb = bfin_lcd_check_fb,
|
|
};
|
|
|
|
static struct lcd_device *lcd_dev;
|
|
#endif
|
|
|
|
static irqreturn_t bfin_bf54x_irq_error(int irq, void *dev_id)
|
|
{
|
|
|
|
/*struct bfin_bf54xfb_info *info = (struct bfin_bf54xfb_info *)dev_id;*/
|
|
|
|
u16 status = bfin_read_EPPI0_STATUS();
|
|
|
|
bfin_write_EPPI0_STATUS(0xFFFF);
|
|
|
|
if (status) {
|
|
bfin_write_EPPI0_CONTROL(bfin_read_EPPI0_CONTROL() & ~EPPI_EN);
|
|
disable_dma(CH_EPPI0);
|
|
|
|
/* start dma */
|
|
enable_dma(CH_EPPI0);
|
|
bfin_write_EPPI0_CONTROL(bfin_read_EPPI0_CONTROL() | EPPI_EN);
|
|
bfin_write_EPPI0_STATUS(0xFFFF);
|
|
}
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static int __init bfin_bf54x_probe(struct platform_device *pdev)
|
|
{
|
|
struct bfin_bf54xfb_info *info;
|
|
struct fb_info *fbinfo;
|
|
int ret;
|
|
|
|
printk(KERN_INFO DRIVER_NAME ": FrameBuffer initializing...\n");
|
|
|
|
if (request_dma(CH_EPPI0, "CH_EPPI0") < 0) {
|
|
printk(KERN_ERR DRIVER_NAME
|
|
": couldn't request CH_EPPI0 DMA\n");
|
|
ret = -EFAULT;
|
|
goto out1;
|
|
}
|
|
|
|
fbinfo =
|
|
framebuffer_alloc(sizeof(struct bfin_bf54xfb_info), &pdev->dev);
|
|
if (!fbinfo) {
|
|
ret = -ENOMEM;
|
|
goto out2;
|
|
}
|
|
|
|
info = fbinfo->par;
|
|
info->fb = fbinfo;
|
|
info->dev = &pdev->dev;
|
|
|
|
platform_set_drvdata(pdev, fbinfo);
|
|
|
|
strcpy(fbinfo->fix.id, driver_name);
|
|
|
|
info->mach_info = pdev->dev.platform_data;
|
|
|
|
if (info->mach_info == NULL) {
|
|
dev_err(&pdev->dev,
|
|
"no platform data for lcd, cannot attach\n");
|
|
ret = -EINVAL;
|
|
goto out3;
|
|
}
|
|
|
|
fbinfo->fix.type = FB_TYPE_PACKED_PIXELS;
|
|
fbinfo->fix.type_aux = 0;
|
|
fbinfo->fix.xpanstep = 0;
|
|
fbinfo->fix.ypanstep = 0;
|
|
fbinfo->fix.ywrapstep = 0;
|
|
fbinfo->fix.accel = FB_ACCEL_NONE;
|
|
fbinfo->fix.visual = FB_VISUAL_TRUECOLOR;
|
|
|
|
fbinfo->var.nonstd = 0;
|
|
fbinfo->var.activate = FB_ACTIVATE_NOW;
|
|
fbinfo->var.height = info->mach_info->height;
|
|
fbinfo->var.width = info->mach_info->width;
|
|
fbinfo->var.accel_flags = 0;
|
|
fbinfo->var.vmode = FB_VMODE_NONINTERLACED;
|
|
|
|
fbinfo->fbops = &bfin_bf54x_fb_ops;
|
|
fbinfo->flags = FBINFO_FLAG_DEFAULT;
|
|
|
|
fbinfo->var.xres = info->mach_info->xres.defval;
|
|
fbinfo->var.xres_virtual = info->mach_info->xres.defval;
|
|
fbinfo->var.yres = info->mach_info->yres.defval;
|
|
fbinfo->var.yres_virtual = info->mach_info->yres.defval;
|
|
fbinfo->var.bits_per_pixel = info->mach_info->bpp.defval;
|
|
|
|
fbinfo->var.upper_margin = 0;
|
|
fbinfo->var.lower_margin = 0;
|
|
fbinfo->var.vsync_len = 0;
|
|
|
|
fbinfo->var.left_margin = 0;
|
|
fbinfo->var.right_margin = 0;
|
|
fbinfo->var.hsync_len = 0;
|
|
|
|
fbinfo->var.red.offset = 16;
|
|
fbinfo->var.green.offset = 8;
|
|
fbinfo->var.blue.offset = 0;
|
|
fbinfo->var.transp.offset = 0;
|
|
fbinfo->var.red.length = 8;
|
|
fbinfo->var.green.length = 8;
|
|
fbinfo->var.blue.length = 8;
|
|
fbinfo->var.transp.length = 0;
|
|
fbinfo->fix.smem_len = info->mach_info->xres.max *
|
|
info->mach_info->yres.max * info->mach_info->bpp.max / 8;
|
|
|
|
fbinfo->fix.line_length = fbinfo->var.xres_virtual *
|
|
fbinfo->var.bits_per_pixel / 8;
|
|
|
|
info->fb_buffer =
|
|
dma_alloc_coherent(NULL, fbinfo->fix.smem_len, &info->dma_handle,
|
|
GFP_KERNEL);
|
|
|
|
if (NULL == info->fb_buffer) {
|
|
printk(KERN_ERR DRIVER_NAME
|
|
": couldn't allocate dma buffer.\n");
|
|
ret = -ENOMEM;
|
|
goto out3;
|
|
}
|
|
|
|
memset(info->fb_buffer, 0, fbinfo->fix.smem_len);
|
|
|
|
fbinfo->screen_base = (void *)info->fb_buffer;
|
|
fbinfo->fix.smem_start = (int)info->fb_buffer;
|
|
|
|
fbinfo->fbops = &bfin_bf54x_fb_ops;
|
|
|
|
fbinfo->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL);
|
|
if (!fbinfo->pseudo_palette) {
|
|
printk(KERN_ERR DRIVER_NAME
|
|
"Fail to allocate pseudo_palette\n");
|
|
|
|
ret = -ENOMEM;
|
|
goto out4;
|
|
}
|
|
|
|
memset(fbinfo->pseudo_palette, 0, sizeof(u32) * 16);
|
|
|
|
if (fb_alloc_cmap(&fbinfo->cmap, BFIN_LCD_NBR_PALETTE_ENTRIES, 0)
|
|
< 0) {
|
|
printk(KERN_ERR DRIVER_NAME
|
|
"Fail to allocate colormap (%d entries)\n",
|
|
BFIN_LCD_NBR_PALETTE_ENTRIES);
|
|
ret = -EFAULT;
|
|
goto out5;
|
|
}
|
|
|
|
if (request_ports(info)) {
|
|
printk(KERN_ERR DRIVER_NAME ": couldn't request gpio port.\n");
|
|
ret = -EFAULT;
|
|
goto out6;
|
|
}
|
|
|
|
info->irq = platform_get_irq(pdev, 0);
|
|
if (info->irq < 0) {
|
|
ret = -EINVAL;
|
|
goto out7;
|
|
}
|
|
|
|
if (request_irq(info->irq, (void *)bfin_bf54x_irq_error, IRQF_DISABLED,
|
|
"PPI ERROR", info) < 0) {
|
|
printk(KERN_ERR DRIVER_NAME
|
|
": unable to request PPI ERROR IRQ\n");
|
|
ret = -EFAULT;
|
|
goto out7;
|
|
}
|
|
|
|
if (register_framebuffer(fbinfo) < 0) {
|
|
printk(KERN_ERR DRIVER_NAME
|
|
": unable to register framebuffer.\n");
|
|
ret = -EINVAL;
|
|
goto out8;
|
|
}
|
|
#ifndef NO_BL_SUPPORT
|
|
bl_dev =
|
|
backlight_device_register("bf54x-bl", NULL, NULL,
|
|
&bfin_lq043fb_bl_ops);
|
|
bl_dev->props.max_brightness = 255;
|
|
|
|
lcd_dev = lcd_device_register(DRIVER_NAME, NULL, &bfin_lcd_ops);
|
|
lcd_dev->props.max_contrast = 255, printk(KERN_INFO "Done.\n");
|
|
#endif
|
|
|
|
return 0;
|
|
|
|
out8:
|
|
free_irq(info->irq, info);
|
|
out7:
|
|
free_ports(info);
|
|
out6:
|
|
fb_dealloc_cmap(&fbinfo->cmap);
|
|
out5:
|
|
kfree(fbinfo->pseudo_palette);
|
|
out4:
|
|
dma_free_coherent(NULL, fbinfo->fix.smem_len, info->fb_buffer,
|
|
info->dma_handle);
|
|
out3:
|
|
framebuffer_release(fbinfo);
|
|
out2:
|
|
free_dma(CH_EPPI0);
|
|
out1:
|
|
platform_set_drvdata(pdev, NULL);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int bfin_bf54x_remove(struct platform_device *pdev)
|
|
{
|
|
|
|
struct fb_info *fbinfo = platform_get_drvdata(pdev);
|
|
struct bfin_bf54xfb_info *info = fbinfo->par;
|
|
|
|
free_dma(CH_EPPI0);
|
|
free_irq(info->irq, info);
|
|
|
|
if (info->fb_buffer != NULL)
|
|
dma_free_coherent(NULL, fbinfo->fix.smem_len, info->fb_buffer,
|
|
info->dma_handle);
|
|
|
|
kfree(fbinfo->pseudo_palette);
|
|
fb_dealloc_cmap(&fbinfo->cmap);
|
|
|
|
#ifndef NO_BL_SUPPORT
|
|
lcd_device_unregister(lcd_dev);
|
|
backlight_device_unregister(bl_dev);
|
|
#endif
|
|
|
|
unregister_framebuffer(fbinfo);
|
|
|
|
free_ports(info);
|
|
|
|
printk(KERN_INFO DRIVER_NAME ": Unregister LCD driver.\n");
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PM
|
|
static int bfin_bf54x_suspend(struct platform_device *pdev, pm_message_t state)
|
|
{
|
|
struct fb_info *fbinfo = platform_get_drvdata(pdev);
|
|
struct bfin_bf54xfb_info *info = fbinfo->par;
|
|
|
|
bfin_write_EPPI0_CONTROL(bfin_read_EPPI0_CONTROL() & ~EPPI_EN);
|
|
disable_dma(CH_EPPI0);
|
|
bfin_write_EPPI0_STATUS(0xFFFF);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int bfin_bf54x_resume(struct platform_device *pdev)
|
|
{
|
|
struct fb_info *fbinfo = platform_get_drvdata(pdev);
|
|
struct bfin_bf54xfb_info *info = fbinfo->par;
|
|
|
|
enable_dma(CH_EPPI0);
|
|
bfin_write_EPPI0_CONTROL(bfin_read_EPPI0_CONTROL() | EPPI_EN);
|
|
|
|
return 0;
|
|
}
|
|
#else
|
|
#define bfin_bf54x_suspend NULL
|
|
#define bfin_bf54x_resume NULL
|
|
#endif
|
|
|
|
static struct platform_driver bfin_bf54x_driver = {
|
|
.probe = bfin_bf54x_probe,
|
|
.remove = bfin_bf54x_remove,
|
|
.suspend = bfin_bf54x_suspend,
|
|
.resume = bfin_bf54x_resume,
|
|
.driver = {
|
|
.name = DRIVER_NAME,
|
|
.owner = THIS_MODULE,
|
|
},
|
|
};
|
|
|
|
static int __devinit bfin_bf54x_driver_init(void)
|
|
{
|
|
return platform_driver_register(&bfin_bf54x_driver);
|
|
}
|
|
|
|
static void __exit bfin_bf54x_driver_cleanup(void)
|
|
{
|
|
platform_driver_unregister(&bfin_bf54x_driver);
|
|
}
|
|
|
|
MODULE_DESCRIPTION("Blackfin BF54x TFT LCD Driver");
|
|
MODULE_LICENSE("GPL");
|
|
|
|
module_init(bfin_bf54x_driver_init);
|
|
module_exit(bfin_bf54x_driver_cleanup);
|