linux/arch/riscv
Albert Ou 922b0375fc riscv: Fix memblock reservation for device tree blob
This fixes an error with how the FDT blob is reserved in memblock.
An incorrect physical address calculation exposed the FDT header to
unintended corruption, which typically manifested with of_fdt_raw_init()
faulting during late boot after fdt_totalsize() returned a wrong value.
Systems with smaller physical memory sizes more frequently trigger this
issue, as the kernel is more likely to allocate from the DMA32 zone
where bbl places the DTB after the kernel image.

Commit 671f9a3e2e ("RISC-V: Setup initial page tables in two stages")
changed the mapping of the DTB to reside in the fixmap area.
Consequently, early_init_fdt_reserve_self() cannot be used anymore in
setup_bootmem() since it relies on __pa() to derive a physical address,
which does not work with dtb_early_va that is no longer a valid kernel
logical address.

The reserved[0x1] region shows the effect of the pointer underflow
resulting from the __pa(initial_boot_params) offset subtraction:

[    0.000000] MEMBLOCK configuration:
[    0.000000]  memory size = 0x000000001fe00000 reserved size = 0x0000000000a2e514
[    0.000000]  memory.cnt  = 0x1
[    0.000000]  memory[0x0]     [0x0000000080200000-0x000000009fffffff], 0x000000001fe00000 bytes flags: 0x0
[    0.000000]  reserved.cnt  = 0x2
[    0.000000]  reserved[0x0]   [0x0000000080200000-0x0000000080c2dfeb], 0x0000000000a2dfec bytes flags: 0x0
[    0.000000]  reserved[0x1]   [0xfffffff080100000-0xfffffff080100527], 0x0000000000000528 bytes flags: 0x0

With the fix applied:

[    0.000000] MEMBLOCK configuration:
[    0.000000]  memory size = 0x000000001fe00000 reserved size = 0x0000000000a2e514
[    0.000000]  memory.cnt  = 0x1
[    0.000000]  memory[0x0]     [0x0000000080200000-0x000000009fffffff], 0x000000001fe00000 bytes flags: 0x0
[    0.000000]  reserved.cnt  = 0x2
[    0.000000]  reserved[0x0]   [0x0000000080200000-0x0000000080c2dfeb], 0x0000000000a2dfec bytes flags: 0x0
[    0.000000]  reserved[0x1]   [0x0000000080e00000-0x0000000080e00527], 0x0000000000000528 bytes flags: 0x0

Fixes: 671f9a3e2e ("RISC-V: Setup initial page tables in two stages")
Signed-off-by: Albert Ou <aou@eecs.berkeley.edu>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
2019-10-01 13:22:39 -07:00
..
boot riscv: dts: sifive: Drop "clock-frequency" property of cpu nodes 2019-09-20 08:37:24 -07:00
configs RISC-V: Enable VIRTIO drivers in RV64 and RV32 defconfig 2019-09-19 05:44:35 -07:00
include RISC-V: Clear load reservations while restoring hart contexts 2019-10-01 13:16:40 -07:00
kernel RISC-V: Clear load reservations while restoring hart contexts 2019-10-01 13:16:40 -07:00
lib riscv: Using CSR numbers to access CSRs 2019-08-30 11:04:19 -07:00
mm riscv: Fix memblock reservation for device tree blob 2019-10-01 13:22:39 -07:00
net bpf, riscv: Enable zext optimization for more RV64G ALU ops 2019-07-05 23:55:41 +02:00
Kbuild riscv: add arch/riscv/Kbuild 2019-08-30 17:34:00 -07:00
Kconfig riscv: make mmap allocation top-down by default 2019-09-24 15:54:12 -07:00
Kconfig.debug RISC-V: Remove EARLY_PRINTK support 2018-12-17 10:23:46 -08:00
Kconfig.socs riscv: select SiFive platform drivers with SOC_SIFIVE 2019-07-01 13:20:01 -07:00
Makefile Kbuild updates for v5.4 2019-09-20 08:36:47 -07:00