8e3007a0e8
The IIS device is being registered by the Simtec Audio driver, and thus registering here causes an error due to device tree naming collision. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
431 lines
11 KiB
C
431 lines
11 KiB
C
/* linux/arch/arm/mach-s3c2410/mach-vr1000.c
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*
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* Copyright (c) 2003-2005 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* Machine support for Thorcom VR1000 board. Designed for Thorcom by
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* Simtec Electronics, http://www.simtec.co.uk/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/timer.h>
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#include <linux/init.h>
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#include <linux/dm9000.h>
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#include <linux/serial.h>
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#include <linux/tty.h>
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#include <linux/serial_8250.h>
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#include <linux/serial_reg.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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#include <asm/arch/bast-map.h>
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#include <asm/arch/vr1000-map.h>
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#include <asm/arch/vr1000-irq.h>
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#include <asm/arch/vr1000-cpld.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/mach-types.h>
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#include <asm/plat-s3c/regs-serial.h>
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#include <asm/arch/regs-gpio.h>
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#include <asm/arch/leds-gpio.h>
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#include <asm/plat-s3c24xx/clock.h>
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#include <asm/plat-s3c24xx/devs.h>
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#include <asm/plat-s3c24xx/cpu.h>
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#include "usb-simtec.h"
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/* macros for virtual address mods for the io space entries */
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#define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
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#define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4)
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#define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3)
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#define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2)
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/* macros to modify the physical addresses for io space */
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#define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2))
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#define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3))
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#define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4))
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#define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))
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static struct map_desc vr1000_iodesc[] __initdata = {
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/* ISA IO areas */
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{
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.virtual = (u32)S3C24XX_VA_ISA_BYTE,
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.pfn = PA_CS2(BAST_PA_ISAIO),
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.length = SZ_16M,
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.type = MT_DEVICE,
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}, {
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.virtual = (u32)S3C24XX_VA_ISA_WORD,
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.pfn = PA_CS3(BAST_PA_ISAIO),
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.length = SZ_16M,
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.type = MT_DEVICE,
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},
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/* CPLD control registers, and external interrupt controls */
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{
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.virtual = (u32)VR1000_VA_CTRL1,
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.pfn = __phys_to_pfn(VR1000_PA_CTRL1),
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.length = SZ_1M,
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.type = MT_DEVICE,
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}, {
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.virtual = (u32)VR1000_VA_CTRL2,
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.pfn = __phys_to_pfn(VR1000_PA_CTRL2),
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.length = SZ_1M,
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.type = MT_DEVICE,
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}, {
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.virtual = (u32)VR1000_VA_CTRL3,
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.pfn = __phys_to_pfn(VR1000_PA_CTRL3),
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.length = SZ_1M,
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.type = MT_DEVICE,
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}, {
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.virtual = (u32)VR1000_VA_CTRL4,
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.pfn = __phys_to_pfn(VR1000_PA_CTRL4),
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.length = SZ_1M,
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.type = MT_DEVICE,
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},
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/* peripheral space... one for each of fast/slow/byte/16bit */
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/* note, ide is only decoded in word space, even though some registers
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* are only 8bit */
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/* slow, byte */
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{ VA_C2(VR1000_VA_IDEPRI), PA_CS3(VR1000_PA_IDEPRI), SZ_1M, MT_DEVICE },
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{ VA_C2(VR1000_VA_IDESEC), PA_CS3(VR1000_PA_IDESEC), SZ_1M, MT_DEVICE },
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{ VA_C2(VR1000_VA_IDEPRIAUX), PA_CS3(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
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{ VA_C2(VR1000_VA_IDESECAUX), PA_CS3(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE },
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/* slow, word */
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{ VA_C3(VR1000_VA_IDEPRI), PA_CS3(VR1000_PA_IDEPRI), SZ_1M, MT_DEVICE },
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{ VA_C3(VR1000_VA_IDESEC), PA_CS3(VR1000_PA_IDESEC), SZ_1M, MT_DEVICE },
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{ VA_C3(VR1000_VA_IDEPRIAUX), PA_CS3(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
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{ VA_C3(VR1000_VA_IDESECAUX), PA_CS3(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE },
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/* fast, byte */
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{ VA_C4(VR1000_VA_IDEPRI), PA_CS5(VR1000_PA_IDEPRI), SZ_1M, MT_DEVICE },
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{ VA_C4(VR1000_VA_IDESEC), PA_CS5(VR1000_PA_IDESEC), SZ_1M, MT_DEVICE },
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{ VA_C4(VR1000_VA_IDEPRIAUX), PA_CS5(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
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{ VA_C4(VR1000_VA_IDESECAUX), PA_CS5(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE },
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/* fast, word */
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{ VA_C5(VR1000_VA_IDEPRI), PA_CS5(VR1000_PA_IDEPRI), SZ_1M, MT_DEVICE },
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{ VA_C5(VR1000_VA_IDESEC), PA_CS5(VR1000_PA_IDESEC), SZ_1M, MT_DEVICE },
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{ VA_C5(VR1000_VA_IDEPRIAUX), PA_CS5(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
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{ VA_C5(VR1000_VA_IDESECAUX), PA_CS5(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE },
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};
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#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
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#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
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#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
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/* uart clock source(s) */
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static struct s3c24xx_uart_clksrc vr1000_serial_clocks[] = {
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[0] = {
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.name = "uclk",
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.divisor = 1,
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.min_baud = 0,
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.max_baud = 0,
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},
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[1] = {
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.name = "pclk",
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.divisor = 1,
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.min_baud = 0,
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.max_baud = 0.
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}
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};
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static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
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[0] = {
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.hwport = 0,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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.clocks = vr1000_serial_clocks,
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.clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
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},
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[1] = {
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.hwport = 1,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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.clocks = vr1000_serial_clocks,
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.clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
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},
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/* port 2 is not actually used */
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[2] = {
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.hwport = 2,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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.clocks = vr1000_serial_clocks,
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.clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
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}
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};
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/* definitions for the vr1000 extra 16550 serial ports */
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#define VR1000_BAUDBASE (3692307)
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#define VR1000_SERIAL_MAPBASE(x) (VR1000_PA_SERIAL + 0x80 + ((x) << 5))
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static struct plat_serial8250_port serial_platform_data[] = {
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[0] = {
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.mapbase = VR1000_SERIAL_MAPBASE(0),
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.irq = IRQ_VR1000_SERIAL + 0,
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.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
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.iotype = UPIO_MEM,
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.regshift = 0,
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.uartclk = VR1000_BAUDBASE,
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},
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[1] = {
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.mapbase = VR1000_SERIAL_MAPBASE(1),
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.irq = IRQ_VR1000_SERIAL + 1,
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.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
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.iotype = UPIO_MEM,
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.regshift = 0,
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.uartclk = VR1000_BAUDBASE,
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},
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[2] = {
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.mapbase = VR1000_SERIAL_MAPBASE(2),
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.irq = IRQ_VR1000_SERIAL + 2,
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.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
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.iotype = UPIO_MEM,
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.regshift = 0,
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.uartclk = VR1000_BAUDBASE,
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},
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[3] = {
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.mapbase = VR1000_SERIAL_MAPBASE(3),
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.irq = IRQ_VR1000_SERIAL + 3,
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.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
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.iotype = UPIO_MEM,
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.regshift = 0,
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.uartclk = VR1000_BAUDBASE,
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},
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{ },
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};
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static struct platform_device serial_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = serial_platform_data,
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},
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};
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/* MTD NOR Flash */
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static struct resource vr1000_nor_resource[] = {
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[0] = {
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.start = S3C2410_CS1 + 0x4000000,
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.end = S3C2410_CS1 + 0x4000000 + SZ_16M - 1,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct platform_device vr1000_nor = {
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.name = "bast-nor",
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.id = -1,
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.num_resources = ARRAY_SIZE(vr1000_nor_resource),
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.resource = vr1000_nor_resource,
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};
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/* DM9000 ethernet devices */
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static struct resource vr1000_dm9k0_resource[] = {
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[0] = {
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.start = S3C2410_CS5 + VR1000_PA_DM9000,
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.end = S3C2410_CS5 + VR1000_PA_DM9000 + 3,
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.flags = IORESOURCE_MEM
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},
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[1] = {
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.start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x40,
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.end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x7f,
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.flags = IORESOURCE_MEM
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},
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[2] = {
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.start = IRQ_VR1000_DM9000A,
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.end = IRQ_VR1000_DM9000A,
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.flags = IORESOURCE_IRQ
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}
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};
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static struct resource vr1000_dm9k1_resource[] = {
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[0] = {
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.start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x80,
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.end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x83,
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.flags = IORESOURCE_MEM
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},
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[1] = {
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.start = S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0,
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.end = S3C2410_CS5 + VR1000_PA_DM9000 + 0xFF,
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.flags = IORESOURCE_MEM
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},
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[2] = {
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.start = IRQ_VR1000_DM9000N,
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.end = IRQ_VR1000_DM9000N,
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.flags = IORESOURCE_IRQ
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}
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};
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/* for the moment we limit ourselves to 16bit IO until some
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* better IO routines can be written and tested
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*/
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static struct dm9000_plat_data vr1000_dm9k_platdata = {
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.flags = DM9000_PLATF_16BITONLY,
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};
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static struct platform_device vr1000_dm9k0 = {
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.name = "dm9000",
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.id = 0,
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.num_resources = ARRAY_SIZE(vr1000_dm9k0_resource),
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.resource = vr1000_dm9k0_resource,
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.dev = {
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.platform_data = &vr1000_dm9k_platdata,
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}
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};
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static struct platform_device vr1000_dm9k1 = {
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.name = "dm9000",
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.id = 1,
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.num_resources = ARRAY_SIZE(vr1000_dm9k1_resource),
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.resource = vr1000_dm9k1_resource,
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.dev = {
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.platform_data = &vr1000_dm9k_platdata,
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}
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};
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/* LEDS */
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static struct s3c24xx_led_platdata vr1000_led1_pdata = {
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.name = "led1",
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.gpio = S3C2410_GPB0,
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.def_trigger = "",
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};
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static struct s3c24xx_led_platdata vr1000_led2_pdata = {
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.name = "led2",
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.gpio = S3C2410_GPB1,
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.def_trigger = "",
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};
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static struct s3c24xx_led_platdata vr1000_led3_pdata = {
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.name = "led3",
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.gpio = S3C2410_GPB2,
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.def_trigger = "",
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};
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static struct platform_device vr1000_led1 = {
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.name = "s3c24xx_led",
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.id = 1,
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.dev = {
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.platform_data = &vr1000_led1_pdata,
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},
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};
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static struct platform_device vr1000_led2 = {
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.name = "s3c24xx_led",
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.id = 2,
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.dev = {
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.platform_data = &vr1000_led2_pdata,
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},
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};
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static struct platform_device vr1000_led3 = {
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.name = "s3c24xx_led",
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.id = 3,
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.dev = {
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.platform_data = &vr1000_led3_pdata,
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},
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};
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/* devices for this board */
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static struct platform_device *vr1000_devices[] __initdata = {
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&s3c_device_usb,
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&s3c_device_lcd,
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&s3c_device_wdt,
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&s3c_device_i2c,
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&s3c_device_adc,
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&serial_device,
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&vr1000_nor,
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&vr1000_dm9k0,
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&vr1000_dm9k1,
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&vr1000_led1,
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&vr1000_led2,
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&vr1000_led3,
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};
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static struct clk *vr1000_clocks[] = {
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&s3c24xx_dclk0,
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&s3c24xx_dclk1,
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&s3c24xx_clkout0,
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&s3c24xx_clkout1,
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&s3c24xx_uclk,
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};
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static void vr1000_power_off(void)
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{
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s3c2410_gpio_cfgpin(S3C2410_GPB9, S3C2410_GPB9_OUTP);
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s3c2410_gpio_setpin(S3C2410_GPB9, 1);
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}
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static void __init vr1000_map_io(void)
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{
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/* initialise clock sources */
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s3c24xx_dclk0.parent = NULL;
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s3c24xx_dclk0.rate = 12*1000*1000;
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s3c24xx_dclk1.parent = NULL;
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s3c24xx_dclk1.rate = 3692307;
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s3c24xx_clkout0.parent = &s3c24xx_dclk0;
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s3c24xx_clkout1.parent = &s3c24xx_dclk1;
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s3c24xx_uclk.parent = &s3c24xx_clkout1;
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s3c24xx_register_clocks(vr1000_clocks, ARRAY_SIZE(vr1000_clocks));
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pm_power_off = vr1000_power_off;
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s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
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s3c24xx_init_clocks(0);
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s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
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}
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static void __init vr1000_init(void)
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{
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platform_add_devices(vr1000_devices, ARRAY_SIZE(vr1000_devices));
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}
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MACHINE_START(VR1000, "Thorcom-VR1000")
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/* Maintainer: Ben Dooks <ben@simtec.co.uk> */
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.phys_io = S3C2410_PA_UART,
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.io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
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.boot_params = S3C2410_SDRAM_PA + 0x100,
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.map_io = vr1000_map_io,
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.init_machine = vr1000_init,
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.init_irq = s3c24xx_init_irq,
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.timer = &s3c24xx_timer,
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MACHINE_END
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