725 lines
18 KiB
C
725 lines
18 KiB
C
/* $Id: sparc-stub.c,v 1.28 2001/10/30 04:54:21 davem Exp $
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* sparc-stub.c: KGDB support for the Linux kernel.
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*
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* Modifications to run under Linux
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* Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
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*
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* This file originally came from the gdb sources, and the
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* copyright notices have been retained below.
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*/
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/****************************************************************************
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THIS SOFTWARE IS NOT COPYRIGHTED
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HP offers the following for use in the public domain. HP makes no
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warranty with regard to the software or its performance and the
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user accepts the software "AS IS" with all faults.
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HP DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD
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TO THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
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****************************************************************************/
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/****************************************************************************
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* Header: remcom.c,v 1.34 91/03/09 12:29:49 glenne Exp $
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*
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* Module name: remcom.c $
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* Revision: 1.34 $
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* Date: 91/03/09 12:29:49 $
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* Contributor: Lake Stevens Instrument Division$
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*
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* Description: low level support for gdb debugger. $
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*
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* Considerations: only works on target hardware $
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*
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* Written by: Glenn Engel $
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* ModuleState: Experimental $
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*
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* NOTES: See Below $
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*
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* Modified for SPARC by Stu Grossman, Cygnus Support.
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*
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* This code has been extensively tested on the Fujitsu SPARClite demo board.
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*
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* To enable debugger support, two things need to happen. One, a
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* call to set_debug_traps() is necessary in order to allow any breakpoints
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* or error conditions to be properly intercepted and reported to gdb.
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* Two, a breakpoint needs to be generated to begin communication. This
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* is most easily accomplished by a call to breakpoint(). Breakpoint()
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* simulates a breakpoint by executing a trap #1.
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*
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*************
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*
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* The following gdb commands are supported:
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*
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* command function Return value
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*
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* g return the value of the CPU registers hex data or ENN
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* G set the value of the CPU registers OK or ENN
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*
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* mAA..AA,LLLL Read LLLL bytes at address AA..AA hex data or ENN
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* MAA..AA,LLLL: Write LLLL bytes at address AA.AA OK or ENN
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*
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* c Resume at current address SNN ( signal NN)
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* cAA..AA Continue at address AA..AA SNN
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*
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* s Step one instruction SNN
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* sAA..AA Step one instruction from AA..AA SNN
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*
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* k kill
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*
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* ? What was the last sigval ? SNN (signal NN)
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*
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* bBB..BB Set baud rate to BB..BB OK or BNN, then sets
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* baud rate
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*
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* All commands and responses are sent with a packet which includes a
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* checksum. A packet consists of
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*
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* $<packet info>#<checksum>.
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*
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* where
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* <packet info> :: <characters representing the command or response>
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* <checksum> :: < two hex digits computed as modulo 256 sum of <packetinfo>>
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*
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* When a packet is received, it is first acknowledged with either '+' or '-'.
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* '+' indicates a successful transfer. '-' indicates a failed transfer.
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*
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* Example:
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*
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* Host: Reply:
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* $m0,10#2a +$00010203040506070809101112131415#42
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*
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****************************************************************************/
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/smp.h>
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#include <linux/smp_lock.h>
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#include <asm/system.h>
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#include <asm/signal.h>
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#include <asm/oplib.h>
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#include <asm/head.h>
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#include <asm/traps.h>
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#include <asm/vac-ops.h>
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#include <asm/kgdb.h>
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#include <asm/pgalloc.h>
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#include <asm/pgtable.h>
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#include <asm/cacheflush.h>
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/*
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*
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* external low-level support routines
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*/
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extern void putDebugChar(char); /* write a single character */
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extern char getDebugChar(void); /* read and return a single char */
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/*
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* BUFMAX defines the maximum number of characters in inbound/outbound buffers
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* at least NUMREGBYTES*2 are needed for register packets
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*/
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#define BUFMAX 2048
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static int initialized; /* !0 means we've been initialized */
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static const char hexchars[]="0123456789abcdef";
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#define NUMREGS 72
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/* Number of bytes of registers. */
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#define NUMREGBYTES (NUMREGS * 4)
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enum regnames {G0, G1, G2, G3, G4, G5, G6, G7,
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O0, O1, O2, O3, O4, O5, SP, O7,
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L0, L1, L2, L3, L4, L5, L6, L7,
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I0, I1, I2, I3, I4, I5, FP, I7,
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F0, F1, F2, F3, F4, F5, F6, F7,
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F8, F9, F10, F11, F12, F13, F14, F15,
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F16, F17, F18, F19, F20, F21, F22, F23,
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F24, F25, F26, F27, F28, F29, F30, F31,
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Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR };
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extern void trap_low(void); /* In arch/sparc/kernel/entry.S */
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unsigned long get_sun4cpte(unsigned long addr)
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{
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unsigned long entry;
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__asm__ __volatile__("\n\tlda [%1] %2, %0\n\t" :
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"=r" (entry) :
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"r" (addr), "i" (ASI_PTE));
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return entry;
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}
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unsigned long get_sun4csegmap(unsigned long addr)
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{
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unsigned long entry;
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__asm__ __volatile__("\n\tlduba [%1] %2, %0\n\t" :
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"=r" (entry) :
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"r" (addr), "i" (ASI_SEGMAP));
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return entry;
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}
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#if 0
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/* Have to sort this out. This cannot be done after initialization. */
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static void flush_cache_all_nop(void) {}
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#endif
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/* Place where we save old trap entries for restoration */
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struct tt_entry kgdb_savettable[256];
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typedef void (*trapfunc_t)(void);
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/* Helper routine for manipulation of kgdb_savettable */
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static inline void copy_ttentry(struct tt_entry *src, struct tt_entry *dest)
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{
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dest->inst_one = src->inst_one;
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dest->inst_two = src->inst_two;
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dest->inst_three = src->inst_three;
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dest->inst_four = src->inst_four;
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}
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/* Initialize the kgdb_savettable so that debugging can commence */
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static void eh_init(void)
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{
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int i;
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for(i=0; i < 256; i++)
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copy_ttentry(&sparc_ttable[i], &kgdb_savettable[i]);
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}
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/* Install an exception handler for kgdb */
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static void exceptionHandler(int tnum, trapfunc_t trap_entry)
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{
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unsigned long te_addr = (unsigned long) trap_entry;
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/* Make new vector */
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sparc_ttable[tnum].inst_one =
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SPARC_BRANCH((unsigned long) te_addr,
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(unsigned long) &sparc_ttable[tnum].inst_one);
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sparc_ttable[tnum].inst_two = SPARC_RD_PSR_L0;
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sparc_ttable[tnum].inst_three = SPARC_NOP;
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sparc_ttable[tnum].inst_four = SPARC_NOP;
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}
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/* Convert ch from a hex digit to an int */
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static int
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hex(unsigned char ch)
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{
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if (ch >= 'a' && ch <= 'f')
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return ch-'a'+10;
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if (ch >= '0' && ch <= '9')
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return ch-'0';
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if (ch >= 'A' && ch <= 'F')
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return ch-'A'+10;
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return -1;
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}
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/* scan for the sequence $<data>#<checksum> */
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static void
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getpacket(char *buffer)
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{
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unsigned char checksum;
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unsigned char xmitcsum;
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int i;
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int count;
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unsigned char ch;
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do {
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/* wait around for the start character, ignore all other characters */
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while ((ch = (getDebugChar() & 0x7f)) != '$') ;
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checksum = 0;
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xmitcsum = -1;
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count = 0;
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/* now, read until a # or end of buffer is found */
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while (count < BUFMAX) {
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ch = getDebugChar() & 0x7f;
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if (ch == '#')
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break;
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checksum = checksum + ch;
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buffer[count] = ch;
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count = count + 1;
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}
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if (count >= BUFMAX)
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continue;
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buffer[count] = 0;
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if (ch == '#') {
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xmitcsum = hex(getDebugChar() & 0x7f) << 4;
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xmitcsum |= hex(getDebugChar() & 0x7f);
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if (checksum != xmitcsum)
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putDebugChar('-'); /* failed checksum */
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else {
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putDebugChar('+'); /* successful transfer */
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/* if a sequence char is present, reply the ID */
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if (buffer[2] == ':') {
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putDebugChar(buffer[0]);
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putDebugChar(buffer[1]);
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/* remove sequence chars from buffer */
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count = strlen(buffer);
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for (i=3; i <= count; i++)
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buffer[i-3] = buffer[i];
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}
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}
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}
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} while (checksum != xmitcsum);
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}
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/* send the packet in buffer. */
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static void
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putpacket(unsigned char *buffer)
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{
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unsigned char checksum;
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int count;
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unsigned char ch, recv;
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/* $<packet info>#<checksum>. */
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do {
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putDebugChar('$');
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checksum = 0;
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count = 0;
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while ((ch = buffer[count])) {
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putDebugChar(ch);
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checksum += ch;
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count += 1;
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}
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putDebugChar('#');
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putDebugChar(hexchars[checksum >> 4]);
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putDebugChar(hexchars[checksum & 0xf]);
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recv = getDebugChar();
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} while ((recv & 0x7f) != '+');
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}
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static char remcomInBuffer[BUFMAX];
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static char remcomOutBuffer[BUFMAX];
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/* Convert the memory pointed to by mem into hex, placing result in buf.
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* Return a pointer to the last char put in buf (null), in case of mem fault,
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* return 0.
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*/
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static unsigned char *
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mem2hex(char *mem, char *buf, int count)
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{
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unsigned char ch;
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while (count-- > 0) {
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/* This assembler code is basically: ch = *mem++;
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* except that we use the SPARC/Linux exception table
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* mechanism (see how "fixup" works in kernel_mna_trap_fault)
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* to arrange for a "return 0" upon a memory fault
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*/
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__asm__(
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"\n1:\n\t"
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"ldub [%0], %1\n\t"
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"inc %0\n\t"
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".section .fixup,#alloc,#execinstr\n\t"
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".align 4\n"
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"2:\n\t"
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"retl\n\t"
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" mov 0, %%o0\n\t"
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".section __ex_table, #alloc\n\t"
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".align 4\n\t"
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".word 1b, 2b\n\t"
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".text\n"
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: "=r" (mem), "=r" (ch) : "0" (mem));
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*buf++ = hexchars[ch >> 4];
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*buf++ = hexchars[ch & 0xf];
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}
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*buf = 0;
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return buf;
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}
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/* convert the hex array pointed to by buf into binary to be placed in mem
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* return a pointer to the character AFTER the last byte written.
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*/
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static char *
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hex2mem(char *buf, char *mem, int count)
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{
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int i;
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unsigned char ch;
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for (i=0; i<count; i++) {
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ch = hex(*buf++) << 4;
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ch |= hex(*buf++);
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/* Assembler code is *mem++ = ch; with return 0 on fault */
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__asm__(
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"\n1:\n\t"
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"stb %1, [%0]\n\t"
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"inc %0\n\t"
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".section .fixup,#alloc,#execinstr\n\t"
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".align 4\n"
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"2:\n\t"
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"retl\n\t"
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" mov 0, %%o0\n\t"
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".section __ex_table, #alloc\n\t"
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".align 4\n\t"
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".word 1b, 2b\n\t"
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".text\n"
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: "=r" (mem) : "r" (ch) , "0" (mem));
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}
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return mem;
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}
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/* This table contains the mapping between SPARC hardware trap types, and
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signals, which are primarily what GDB understands. It also indicates
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which hardware traps we need to commandeer when initializing the stub. */
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static struct hard_trap_info
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{
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unsigned char tt; /* Trap type code for SPARC */
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unsigned char signo; /* Signal that we map this trap into */
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} hard_trap_info[] = {
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{SP_TRAP_SBPT, SIGTRAP}, /* ta 1 - Linux/KGDB software breakpoint */
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{0, 0} /* Must be last */
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};
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/* Set up exception handlers for tracing and breakpoints */
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void
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set_debug_traps(void)
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{
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struct hard_trap_info *ht;
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unsigned long flags;
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local_irq_save(flags);
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#if 0
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/* Have to sort this out. This cannot be done after initialization. */
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BTFIXUPSET_CALL(flush_cache_all, flush_cache_all_nop, BTFIXUPCALL_NOP);
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#endif
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/* Initialize our copy of the Linux Sparc trap table */
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eh_init();
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for (ht = hard_trap_info; ht->tt && ht->signo; ht++) {
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/* Only if it doesn't destroy our fault handlers */
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if((ht->tt != SP_TRAP_TFLT) &&
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(ht->tt != SP_TRAP_DFLT))
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exceptionHandler(ht->tt, trap_low);
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}
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/* In case GDB is started before us, ack any packets (presumably
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* "$?#xx") sitting there.
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*
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* I've found this code causes more problems than it solves,
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* so that's why it's commented out. GDB seems to work fine
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* now starting either before or after the kernel -bwb
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*/
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#if 0
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while((c = getDebugChar()) != '$');
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while((c = getDebugChar()) != '#');
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c = getDebugChar(); /* eat first csum byte */
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c = getDebugChar(); /* eat second csum byte */
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putDebugChar('+'); /* ack it */
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#endif
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initialized = 1; /* connect! */
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local_irq_restore(flags);
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}
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/* Convert the SPARC hardware trap type code to a unix signal number. */
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static int
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computeSignal(int tt)
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{
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struct hard_trap_info *ht;
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for (ht = hard_trap_info; ht->tt && ht->signo; ht++)
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if (ht->tt == tt)
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return ht->signo;
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return SIGHUP; /* default for things we don't know about */
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}
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/*
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* While we find nice hex chars, build an int.
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* Return number of chars processed.
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*/
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static int
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hexToInt(char **ptr, int *intValue)
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{
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int numChars = 0;
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int hexValue;
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*intValue = 0;
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while (**ptr) {
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hexValue = hex(**ptr);
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if (hexValue < 0)
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break;
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*intValue = (*intValue << 4) | hexValue;
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numChars ++;
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(*ptr)++;
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}
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return (numChars);
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}
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/*
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* This function does all command processing for interfacing to gdb. It
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* returns 1 if you should skip the instruction at the trap address, 0
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* otherwise.
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*/
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extern void breakinst(void);
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void
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handle_exception (unsigned long *registers)
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{
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int tt; /* Trap type */
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int sigval;
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int addr;
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int length;
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char *ptr;
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unsigned long *sp;
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/* First, we must force all of the windows to be spilled out */
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asm("save %sp, -64, %sp\n\t"
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"save %sp, -64, %sp\n\t"
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"save %sp, -64, %sp\n\t"
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"save %sp, -64, %sp\n\t"
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"save %sp, -64, %sp\n\t"
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"save %sp, -64, %sp\n\t"
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"save %sp, -64, %sp\n\t"
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"save %sp, -64, %sp\n\t"
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"restore\n\t"
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"restore\n\t"
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"restore\n\t"
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"restore\n\t"
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"restore\n\t"
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"restore\n\t"
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"restore\n\t"
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"restore\n\t");
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lock_kernel();
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if (registers[PC] == (unsigned long)breakinst) {
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/* Skip over breakpoint trap insn */
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registers[PC] = registers[NPC];
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registers[NPC] += 4;
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}
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sp = (unsigned long *)registers[SP];
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tt = (registers[TBR] >> 4) & 0xff;
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/* reply to host that an exception has occurred */
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sigval = computeSignal(tt);
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ptr = remcomOutBuffer;
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*ptr++ = 'T';
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*ptr++ = hexchars[sigval >> 4];
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*ptr++ = hexchars[sigval & 0xf];
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*ptr++ = hexchars[PC >> 4];
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*ptr++ = hexchars[PC & 0xf];
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*ptr++ = ':';
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ptr = mem2hex((char *)®isters[PC], ptr, 4);
|
|
*ptr++ = ';';
|
|
|
|
*ptr++ = hexchars[FP >> 4];
|
|
*ptr++ = hexchars[FP & 0xf];
|
|
*ptr++ = ':';
|
|
ptr = mem2hex((char *) (sp + 8 + 6), ptr, 4); /* FP */
|
|
*ptr++ = ';';
|
|
|
|
*ptr++ = hexchars[SP >> 4];
|
|
*ptr++ = hexchars[SP & 0xf];
|
|
*ptr++ = ':';
|
|
ptr = mem2hex((char *)&sp, ptr, 4);
|
|
*ptr++ = ';';
|
|
|
|
*ptr++ = hexchars[NPC >> 4];
|
|
*ptr++ = hexchars[NPC & 0xf];
|
|
*ptr++ = ':';
|
|
ptr = mem2hex((char *)®isters[NPC], ptr, 4);
|
|
*ptr++ = ';';
|
|
|
|
*ptr++ = hexchars[O7 >> 4];
|
|
*ptr++ = hexchars[O7 & 0xf];
|
|
*ptr++ = ':';
|
|
ptr = mem2hex((char *)®isters[O7], ptr, 4);
|
|
*ptr++ = ';';
|
|
|
|
*ptr++ = 0;
|
|
|
|
putpacket(remcomOutBuffer);
|
|
|
|
/* XXX We may want to add some features dealing with poking the
|
|
* XXX page tables, the real ones on the srmmu, and what is currently
|
|
* XXX loaded in the sun4/sun4c tlb at this point in time. But this
|
|
* XXX also required hacking to the gdb sources directly...
|
|
*/
|
|
|
|
while (1) {
|
|
remcomOutBuffer[0] = 0;
|
|
|
|
getpacket(remcomInBuffer);
|
|
switch (remcomInBuffer[0]) {
|
|
case '?':
|
|
remcomOutBuffer[0] = 'S';
|
|
remcomOutBuffer[1] = hexchars[sigval >> 4];
|
|
remcomOutBuffer[2] = hexchars[sigval & 0xf];
|
|
remcomOutBuffer[3] = 0;
|
|
break;
|
|
|
|
case 'd':
|
|
/* toggle debug flag */
|
|
break;
|
|
|
|
case 'g': /* return the value of the CPU registers */
|
|
{
|
|
ptr = remcomOutBuffer;
|
|
/* G & O regs */
|
|
ptr = mem2hex((char *)registers, ptr, 16 * 4);
|
|
/* L & I regs */
|
|
ptr = mem2hex((char *) (sp + 0), ptr, 16 * 4);
|
|
/* Floating point */
|
|
memset(ptr, '0', 32 * 8);
|
|
/* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
|
|
mem2hex((char *)®isters[Y], (ptr + 32 * 4 * 2), (8 * 4));
|
|
}
|
|
break;
|
|
|
|
case 'G': /* set the value of the CPU registers - return OK */
|
|
{
|
|
unsigned long *newsp, psr;
|
|
|
|
psr = registers[PSR];
|
|
|
|
ptr = &remcomInBuffer[1];
|
|
/* G & O regs */
|
|
hex2mem(ptr, (char *)registers, 16 * 4);
|
|
/* L & I regs */
|
|
hex2mem(ptr + 16 * 4 * 2, (char *) (sp + 0), 16 * 4);
|
|
/* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
|
|
hex2mem(ptr + 64 * 4 * 2, (char *)®isters[Y], 8 * 4);
|
|
|
|
/* See if the stack pointer has moved. If so,
|
|
* then copy the saved locals and ins to the
|
|
* new location. This keeps the window
|
|
* overflow and underflow routines happy.
|
|
*/
|
|
|
|
newsp = (unsigned long *)registers[SP];
|
|
if (sp != newsp)
|
|
sp = memcpy(newsp, sp, 16 * 4);
|
|
|
|
/* Don't allow CWP to be modified. */
|
|
|
|
if (psr != registers[PSR])
|
|
registers[PSR] = (psr & 0x1f) | (registers[PSR] & ~0x1f);
|
|
|
|
strcpy(remcomOutBuffer,"OK");
|
|
}
|
|
break;
|
|
|
|
case 'm': /* mAA..AA,LLLL Read LLLL bytes at address AA..AA */
|
|
/* Try to read %x,%x. */
|
|
|
|
ptr = &remcomInBuffer[1];
|
|
|
|
if (hexToInt(&ptr, &addr)
|
|
&& *ptr++ == ','
|
|
&& hexToInt(&ptr, &length)) {
|
|
if (mem2hex((char *)addr, remcomOutBuffer, length))
|
|
break;
|
|
|
|
strcpy (remcomOutBuffer, "E03");
|
|
} else {
|
|
strcpy(remcomOutBuffer,"E01");
|
|
}
|
|
break;
|
|
|
|
case 'M': /* MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK */
|
|
/* Try to read '%x,%x:'. */
|
|
|
|
ptr = &remcomInBuffer[1];
|
|
|
|
if (hexToInt(&ptr, &addr)
|
|
&& *ptr++ == ','
|
|
&& hexToInt(&ptr, &length)
|
|
&& *ptr++ == ':') {
|
|
if (hex2mem(ptr, (char *)addr, length)) {
|
|
strcpy(remcomOutBuffer, "OK");
|
|
} else {
|
|
strcpy(remcomOutBuffer, "E03");
|
|
}
|
|
} else {
|
|
strcpy(remcomOutBuffer, "E02");
|
|
}
|
|
break;
|
|
|
|
case 'c': /* cAA..AA Continue at address AA..AA(optional) */
|
|
/* try to read optional parameter, pc unchanged if no parm */
|
|
|
|
ptr = &remcomInBuffer[1];
|
|
if (hexToInt(&ptr, &addr)) {
|
|
registers[PC] = addr;
|
|
registers[NPC] = addr + 4;
|
|
}
|
|
|
|
/* Need to flush the instruction cache here, as we may have deposited a
|
|
* breakpoint, and the icache probably has no way of knowing that a data ref to
|
|
* some location may have changed something that is in the instruction cache.
|
|
*/
|
|
flush_cache_all();
|
|
unlock_kernel();
|
|
return;
|
|
|
|
/* kill the program */
|
|
case 'k' : /* do nothing */
|
|
break;
|
|
case 'r': /* Reset */
|
|
asm ("call 0\n\t"
|
|
"nop\n\t");
|
|
break;
|
|
} /* switch */
|
|
|
|
/* reply to the request */
|
|
putpacket(remcomOutBuffer);
|
|
} /* while(1) */
|
|
}
|
|
|
|
/* This function will generate a breakpoint exception. It is used at the
|
|
beginning of a program to sync up with a debugger and can be used
|
|
otherwise as a quick means to stop program execution and "break" into
|
|
the debugger. */
|
|
|
|
void
|
|
breakpoint(void)
|
|
{
|
|
if (!initialized)
|
|
return;
|
|
|
|
/* Again, watch those c-prefixes for ELF kernels */
|
|
#if defined(__svr4__) || defined(__ELF__)
|
|
asm(".globl breakinst\n"
|
|
"breakinst:\n\t"
|
|
"ta 1\n");
|
|
#else
|
|
asm(".globl _breakinst\n"
|
|
"_breakinst:\n\t"
|
|
"ta 1\n");
|
|
#endif
|
|
}
|