896 lines
21 KiB
C
896 lines
21 KiB
C
/*
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* Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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*
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* File: mac.c
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*
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* Purpose: MAC routines
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*
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* Author: Tevin Chen
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*
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* Date: May 21, 1996
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*
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* Functions:
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* MACbIsRegBitsOn - Test if All test Bits On
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* MACbIsRegBitsOff - Test if All test Bits Off
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* MACbIsIntDisable - Test if MAC interrupt disable
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* MACvSetShortRetryLimit - Set 802.11 Short Retry limit
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* MACvSetLongRetryLimit - Set 802.11 Long Retry limit
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* MACvSetLoopbackMode - Set MAC Loopback Mode
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* MACvSaveContext - Save Context of MAC Registers
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* MACvRestoreContext - Restore Context of MAC Registers
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* MACbSoftwareReset - Software Reset MAC
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* MACbSafeRxOff - Turn Off MAC Rx
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* MACbSafeTxOff - Turn Off MAC Tx
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* MACbSafeStop - Stop MAC function
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* MACbShutdown - Shut down MAC
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* MACvInitialize - Initialize MAC
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* MACvSetCurrRxDescAddr - Set Rx Descriptors Address
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* MACvSetCurrTx0DescAddr - Set Tx0 Descriptors Address
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* MACvSetCurrTx1DescAddr - Set Tx1 Descriptors Address
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* MACvTimer0MicroSDelay - Micro Second Delay Loop by MAC
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*
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* Revision History:
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* 08-22-2003 Kyle Hsu : Porting MAC functions from sim53
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* 09-03-2003 Bryan YC Fan : Add MACvClearBusSusInd()& MACvEnableBusSusEn()
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* 09-18-2003 Jerry Chen : Add MACvSetKeyEntry & MACvDisableKeyEntry
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*
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*/
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#include "tmacro.h"
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#include "mac.h"
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/*
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* Description:
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* Test if all test bits on
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*
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* Parameters:
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* In:
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* dwIoBase - Base Address for MAC
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* byRegOfs - Offset of MAC Register
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* byTestBits - Test bits
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* Out:
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* none
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*
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* Return Value: true if all test bits On; otherwise false
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*
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*/
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bool MACbIsRegBitsOn(void __iomem *dwIoBase, unsigned char byRegOfs, unsigned char byTestBits)
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{
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unsigned char byData;
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VNSvInPortB(dwIoBase + byRegOfs, &byData);
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return (byData & byTestBits) == byTestBits;
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}
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/*
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* Description:
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* Test if all test bits off
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*
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* Parameters:
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* In:
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* dwIoBase - Base Address for MAC
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* byRegOfs - Offset of MAC Register
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* byTestBits - Test bits
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* Out:
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* none
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*
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* Return Value: true if all test bits Off; otherwise false
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*
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*/
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bool MACbIsRegBitsOff(void __iomem *dwIoBase, unsigned char byRegOfs, unsigned char byTestBits)
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{
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unsigned char byData;
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VNSvInPortB(dwIoBase + byRegOfs, &byData);
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return !(byData & byTestBits);
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}
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/*
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* Description:
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* Test if MAC interrupt disable
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*
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* Parameters:
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* In:
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* dwIoBase - Base Address for MAC
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* Out:
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* none
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*
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* Return Value: true if interrupt is disable; otherwise false
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*
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*/
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bool MACbIsIntDisable(void __iomem *dwIoBase)
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{
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unsigned long dwData;
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VNSvInPortD(dwIoBase + MAC_REG_IMR, &dwData);
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if (dwData != 0)
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return false;
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return true;
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}
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/*
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* Description:
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* Set 802.11 Short Retry Limit
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*
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* Parameters:
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* In:
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* dwIoBase - Base Address for MAC
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* byRetryLimit- Retry Limit
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* Out:
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* none
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*
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* Return Value: none
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*
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*/
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void MACvSetShortRetryLimit(void __iomem *dwIoBase, unsigned char byRetryLimit)
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{
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// set SRT
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VNSvOutPortB(dwIoBase + MAC_REG_SRT, byRetryLimit);
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}
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/*
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* Description:
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* Set 802.11 Long Retry Limit
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*
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* Parameters:
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* In:
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* dwIoBase - Base Address for MAC
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* byRetryLimit- Retry Limit
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* Out:
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* none
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*
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* Return Value: none
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*
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*/
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void MACvSetLongRetryLimit(void __iomem *dwIoBase, unsigned char byRetryLimit)
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{
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// set LRT
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VNSvOutPortB(dwIoBase + MAC_REG_LRT, byRetryLimit);
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}
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/*
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* Description:
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* Set MAC Loopback mode
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*
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* Parameters:
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* In:
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* dwIoBase - Base Address for MAC
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* byLoopbackMode - Loopback Mode
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* Out:
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* none
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*
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* Return Value: none
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*
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*/
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void MACvSetLoopbackMode(void __iomem *dwIoBase, unsigned char byLoopbackMode)
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{
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unsigned char byOrgValue;
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ASSERT(byLoopbackMode < 3);
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byLoopbackMode <<= 6;
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// set TCR
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VNSvInPortB(dwIoBase + MAC_REG_TEST, &byOrgValue);
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byOrgValue = byOrgValue & 0x3F;
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byOrgValue = byOrgValue | byLoopbackMode;
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VNSvOutPortB(dwIoBase + MAC_REG_TEST, byOrgValue);
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}
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/*
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* Description:
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* Save MAC registers to context buffer
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*
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* Parameters:
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* In:
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* dwIoBase - Base Address for MAC
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* Out:
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* pbyCxtBuf - Context buffer
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*
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* Return Value: none
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*
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*/
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void MACvSaveContext(void __iomem *dwIoBase, unsigned char *pbyCxtBuf)
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{
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int ii;
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// read page0 register
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for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE0; ii++)
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VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + ii));
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MACvSelectPage1(dwIoBase);
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// read page1 register
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for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++)
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VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
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MACvSelectPage0(dwIoBase);
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}
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/*
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* Description:
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* Restore MAC registers from context buffer
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*
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* Parameters:
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* In:
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* dwIoBase - Base Address for MAC
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* pbyCxtBuf - Context buffer
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* Out:
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* none
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*
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* Return Value: none
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*
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*/
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void MACvRestoreContext(void __iomem *dwIoBase, unsigned char *pbyCxtBuf)
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{
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int ii;
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MACvSelectPage1(dwIoBase);
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// restore page1
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for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++)
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VNSvOutPortB((dwIoBase + ii), *(pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
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MACvSelectPage0(dwIoBase);
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// restore RCR,TCR,IMR...
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for (ii = MAC_REG_RCR; ii < MAC_REG_ISR; ii++)
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VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
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// restore MAC Config.
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for (ii = MAC_REG_LRT; ii < MAC_REG_PAGE1SEL; ii++)
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VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
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VNSvOutPortB(dwIoBase + MAC_REG_CFG, *(pbyCxtBuf + MAC_REG_CFG));
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// restore PS Config.
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for (ii = MAC_REG_PSCFG; ii < MAC_REG_BBREGCTL; ii++)
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VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
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// restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR
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VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, *(unsigned long *)(pbyCxtBuf + MAC_REG_TXDMAPTR0));
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VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, *(unsigned long *)(pbyCxtBuf + MAC_REG_AC0DMAPTR));
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VNSvOutPortD(dwIoBase + MAC_REG_BCNDMAPTR, *(unsigned long *)(pbyCxtBuf + MAC_REG_BCNDMAPTR));
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VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR0));
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VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR1));
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}
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/*
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* Description:
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* Software Reset MAC
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*
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* Parameters:
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* In:
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* dwIoBase - Base Address for MAC
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* Out:
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* none
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*
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* Return Value: true if Reset Success; otherwise false
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*
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*/
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bool MACbSoftwareReset(void __iomem *dwIoBase)
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{
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unsigned char byData;
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unsigned short ww;
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// turn on HOSTCR_SOFTRST, just write 0x01 to reset
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VNSvOutPortB(dwIoBase + MAC_REG_HOSTCR, 0x01);
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for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
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VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
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if (!(byData & HOSTCR_SOFTRST))
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break;
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}
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if (ww == W_MAX_TIMEOUT)
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return false;
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return true;
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}
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/*
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* Description:
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* save some important register's value, then do reset, then restore register's value
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*
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* Parameters:
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* In:
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* dwIoBase - Base Address for MAC
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* Out:
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* none
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*
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* Return Value: true if success; otherwise false
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*
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*/
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bool MACbSafeSoftwareReset(void __iomem *dwIoBase)
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{
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unsigned char abyTmpRegData[MAC_MAX_CONTEXT_SIZE_PAGE0+MAC_MAX_CONTEXT_SIZE_PAGE1];
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bool bRetVal;
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// PATCH....
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// save some important register's value, then do
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// reset, then restore register's value
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// save MAC context
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MACvSaveContext(dwIoBase, abyTmpRegData);
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// do reset
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bRetVal = MACbSoftwareReset(dwIoBase);
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// restore MAC context, except CR0
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MACvRestoreContext(dwIoBase, abyTmpRegData);
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return bRetVal;
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}
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/*
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* Description:
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* Turn Off MAC Rx
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*
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* Parameters:
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* In:
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* dwIoBase - Base Address for MAC
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* Out:
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* none
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*
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* Return Value: true if success; otherwise false
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*
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*/
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bool MACbSafeRxOff(void __iomem *dwIoBase)
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{
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unsigned short ww;
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unsigned long dwData;
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unsigned char byData;
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// turn off wow temp for turn off Rx safely
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// Clear RX DMA0,1
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VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_CLRRUN);
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VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_CLRRUN);
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for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
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VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL0, &dwData);
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if (!(dwData & DMACTL_RUN))
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break;
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}
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if (ww == W_MAX_TIMEOUT) {
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DBG_PORT80(0x10);
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pr_debug(" DBG_PORT80(0x10)\n");
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return false;
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}
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for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
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VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL1, &dwData);
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if (!(dwData & DMACTL_RUN))
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break;
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}
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if (ww == W_MAX_TIMEOUT) {
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DBG_PORT80(0x11);
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pr_debug(" DBG_PORT80(0x11)\n");
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return false;
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}
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// try to safe shutdown RX
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MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_RXON);
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// W_MAX_TIMEOUT is the timeout period
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for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
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VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
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if (!(byData & HOSTCR_RXONST))
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break;
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}
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if (ww == W_MAX_TIMEOUT) {
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DBG_PORT80(0x12);
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pr_debug(" DBG_PORT80(0x12)\n");
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return false;
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}
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return true;
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}
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/*
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* Description:
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* Turn Off MAC Tx
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*
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* Parameters:
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* In:
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* dwIoBase - Base Address for MAC
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* Out:
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* none
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*
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* Return Value: true if success; otherwise false
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*
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*/
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bool MACbSafeTxOff(void __iomem *dwIoBase)
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{
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unsigned short ww;
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unsigned long dwData;
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unsigned char byData;
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// Clear TX DMA
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//Tx0
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VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_CLRRUN);
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//AC0
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VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_CLRRUN);
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for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
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VNSvInPortD(dwIoBase + MAC_REG_TXDMACTL0, &dwData);
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if (!(dwData & DMACTL_RUN))
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break;
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}
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if (ww == W_MAX_TIMEOUT) {
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DBG_PORT80(0x20);
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pr_debug(" DBG_PORT80(0x20)\n");
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return false;
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}
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for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
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VNSvInPortD(dwIoBase + MAC_REG_AC0DMACTL, &dwData);
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if (!(dwData & DMACTL_RUN))
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break;
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}
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if (ww == W_MAX_TIMEOUT) {
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DBG_PORT80(0x21);
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pr_debug(" DBG_PORT80(0x21)\n");
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return false;
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}
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// try to safe shutdown TX
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MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_TXON);
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// W_MAX_TIMEOUT is the timeout period
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for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
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VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
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if (!(byData & HOSTCR_TXONST))
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break;
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}
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if (ww == W_MAX_TIMEOUT) {
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DBG_PORT80(0x24);
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pr_debug(" DBG_PORT80(0x24)\n");
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return false;
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}
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return true;
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}
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/*
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* Description:
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* Stop MAC function
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*
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* Parameters:
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* In:
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* dwIoBase - Base Address for MAC
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* Out:
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* none
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*
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* Return Value: true if success; otherwise false
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*
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*/
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bool MACbSafeStop(void __iomem *dwIoBase)
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{
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MACvRegBitsOff(dwIoBase, MAC_REG_TCR, TCR_AUTOBCNTX);
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if (!MACbSafeRxOff(dwIoBase)) {
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DBG_PORT80(0xA1);
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pr_debug(" MACbSafeRxOff == false)\n");
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MACbSafeSoftwareReset(dwIoBase);
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return false;
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}
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if (!MACbSafeTxOff(dwIoBase)) {
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DBG_PORT80(0xA2);
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pr_debug(" MACbSafeTxOff == false)\n");
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MACbSafeSoftwareReset(dwIoBase);
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return false;
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}
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MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_MACEN);
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return true;
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}
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/*
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* Description:
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* Shut Down MAC
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*
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* Parameters:
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* In:
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* dwIoBase - Base Address for MAC
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* Out:
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* none
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*
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* Return Value: true if success; otherwise false
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*
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*/
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bool MACbShutdown(void __iomem *dwIoBase)
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{
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// disable MAC IMR
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MACvIntDisable(dwIoBase);
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MACvSetLoopbackMode(dwIoBase, MAC_LB_INTERNAL);
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// stop the adapter
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if (!MACbSafeStop(dwIoBase)) {
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MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE);
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return false;
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}
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MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE);
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return true;
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}
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/*
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* Description:
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* Initialize MAC
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*
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* Parameters:
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* In:
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* dwIoBase - Base Address for MAC
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* Out:
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* none
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*
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* Return Value: none
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*
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*/
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void MACvInitialize(void __iomem *dwIoBase)
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{
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// clear sticky bits
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MACvClearStckDS(dwIoBase);
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// disable force PME-enable
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VNSvOutPortB(dwIoBase + MAC_REG_PMC1, PME_OVR);
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// only 3253 A
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// do reset
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MACbSoftwareReset(dwIoBase);
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|
|
// reset TSF counter
|
|
VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
|
|
// enable TSF counter
|
|
VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
|
|
}
|
|
|
|
/*
|
|
* Description:
|
|
* Set the chip with current rx descriptor address
|
|
*
|
|
* Parameters:
|
|
* In:
|
|
* dwIoBase - Base Address for MAC
|
|
* dwCurrDescAddr - Descriptor Address
|
|
* Out:
|
|
* none
|
|
*
|
|
* Return Value: none
|
|
*
|
|
*/
|
|
void MACvSetCurrRx0DescAddr(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
|
|
{
|
|
unsigned short ww;
|
|
unsigned char byData;
|
|
unsigned char byOrgDMACtl;
|
|
|
|
VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byOrgDMACtl);
|
|
if (byOrgDMACtl & DMACTL_RUN)
|
|
VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0+2, DMACTL_RUN);
|
|
|
|
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
|
|
VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byData);
|
|
if (!(byData & DMACTL_RUN))
|
|
break;
|
|
}
|
|
|
|
if (ww == W_MAX_TIMEOUT)
|
|
DBG_PORT80(0x13);
|
|
|
|
VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, dwCurrDescAddr);
|
|
if (byOrgDMACtl & DMACTL_RUN)
|
|
VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_RUN);
|
|
}
|
|
|
|
/*
|
|
* Description:
|
|
* Set the chip with current rx descriptor address
|
|
*
|
|
* Parameters:
|
|
* In:
|
|
* dwIoBase - Base Address for MAC
|
|
* dwCurrDescAddr - Descriptor Address
|
|
* Out:
|
|
* none
|
|
*
|
|
* Return Value: none
|
|
*
|
|
*/
|
|
void MACvSetCurrRx1DescAddr(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
|
|
{
|
|
unsigned short ww;
|
|
unsigned char byData;
|
|
unsigned char byOrgDMACtl;
|
|
|
|
VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byOrgDMACtl);
|
|
if (byOrgDMACtl & DMACTL_RUN)
|
|
VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1+2, DMACTL_RUN);
|
|
|
|
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
|
|
VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byData);
|
|
if (!(byData & DMACTL_RUN))
|
|
break;
|
|
}
|
|
if (ww == W_MAX_TIMEOUT)
|
|
DBG_PORT80(0x14);
|
|
|
|
VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, dwCurrDescAddr);
|
|
if (byOrgDMACtl & DMACTL_RUN)
|
|
VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_RUN);
|
|
|
|
}
|
|
|
|
/*
|
|
* Description:
|
|
* Set the chip with current tx0 descriptor address
|
|
*
|
|
* Parameters:
|
|
* In:
|
|
* dwIoBase - Base Address for MAC
|
|
* dwCurrDescAddr - Descriptor Address
|
|
* Out:
|
|
* none
|
|
*
|
|
* Return Value: none
|
|
*
|
|
*/
|
|
void MACvSetCurrTx0DescAddrEx(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
|
|
{
|
|
unsigned short ww;
|
|
unsigned char byData;
|
|
unsigned char byOrgDMACtl;
|
|
|
|
VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byOrgDMACtl);
|
|
if (byOrgDMACtl & DMACTL_RUN)
|
|
VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0+2, DMACTL_RUN);
|
|
|
|
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
|
|
VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byData);
|
|
if (!(byData & DMACTL_RUN))
|
|
break;
|
|
}
|
|
if (ww == W_MAX_TIMEOUT)
|
|
DBG_PORT80(0x25);
|
|
|
|
VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, dwCurrDescAddr);
|
|
if (byOrgDMACtl & DMACTL_RUN)
|
|
VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_RUN);
|
|
}
|
|
|
|
/*
|
|
* Description:
|
|
* Set the chip with current AC0 descriptor address
|
|
*
|
|
* Parameters:
|
|
* In:
|
|
* dwIoBase - Base Address for MAC
|
|
* dwCurrDescAddr - Descriptor Address
|
|
* Out:
|
|
* none
|
|
*
|
|
* Return Value: none
|
|
*
|
|
*/
|
|
//TxDMA1 = AC0DMA
|
|
void MACvSetCurrAC0DescAddrEx(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
|
|
{
|
|
unsigned short ww;
|
|
unsigned char byData;
|
|
unsigned char byOrgDMACtl;
|
|
|
|
VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byOrgDMACtl);
|
|
if (byOrgDMACtl & DMACTL_RUN)
|
|
VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL+2, DMACTL_RUN);
|
|
|
|
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
|
|
VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byData);
|
|
if (!(byData & DMACTL_RUN))
|
|
break;
|
|
}
|
|
if (ww == W_MAX_TIMEOUT) {
|
|
DBG_PORT80(0x26);
|
|
pr_debug(" DBG_PORT80(0x26)\n");
|
|
}
|
|
VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, dwCurrDescAddr);
|
|
if (byOrgDMACtl & DMACTL_RUN)
|
|
VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_RUN);
|
|
}
|
|
|
|
void MACvSetCurrTXDescAddr(int iTxType, void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
|
|
{
|
|
if (iTxType == TYPE_AC0DMA)
|
|
MACvSetCurrAC0DescAddrEx(dwIoBase, dwCurrDescAddr);
|
|
else if (iTxType == TYPE_TXDMA0)
|
|
MACvSetCurrTx0DescAddrEx(dwIoBase, dwCurrDescAddr);
|
|
}
|
|
|
|
/*
|
|
* Description:
|
|
* Micro Second Delay via MAC
|
|
*
|
|
* Parameters:
|
|
* In:
|
|
* dwIoBase - Base Address for MAC
|
|
* uDelay - Delay time (timer resolution is 4 us)
|
|
* Out:
|
|
* none
|
|
*
|
|
* Return Value: none
|
|
*
|
|
*/
|
|
void MACvTimer0MicroSDelay(void __iomem *dwIoBase, unsigned int uDelay)
|
|
{
|
|
unsigned char byValue;
|
|
unsigned int uu, ii;
|
|
|
|
VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
|
|
VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelay);
|
|
VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE));
|
|
for (ii = 0; ii < 66; ii++) { // assume max PCI clock is 66Mhz
|
|
for (uu = 0; uu < uDelay; uu++) {
|
|
VNSvInPortB(dwIoBase + MAC_REG_TMCTL0, &byValue);
|
|
if ((byValue == 0) ||
|
|
(byValue & TMCTL_TSUSP)) {
|
|
VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
|
|
return;
|
|
}
|
|
}
|
|
}
|
|
VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
|
|
}
|
|
|
|
/*
|
|
* Description:
|
|
* Micro Second One shot timer via MAC
|
|
*
|
|
* Parameters:
|
|
* In:
|
|
* dwIoBase - Base Address for MAC
|
|
* uDelay - Delay time
|
|
* Out:
|
|
* none
|
|
*
|
|
* Return Value: none
|
|
*
|
|
*/
|
|
void MACvOneShotTimer1MicroSec(void __iomem *dwIoBase, unsigned int uDelayTime)
|
|
{
|
|
VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, 0);
|
|
VNSvOutPortD(dwIoBase + MAC_REG_TMDATA1, uDelayTime);
|
|
VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, (TMCTL_TMD | TMCTL_TE));
|
|
}
|
|
|
|
void MACvSetMISCFifo(void __iomem *dwIoBase, unsigned short wOffset, unsigned long dwData)
|
|
{
|
|
if (wOffset > 273)
|
|
return;
|
|
VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
|
|
VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
|
|
VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
|
|
}
|
|
|
|
bool MACbPSWakeup(void __iomem *dwIoBase)
|
|
{
|
|
unsigned char byOrgValue;
|
|
unsigned int ww;
|
|
// Read PSCTL
|
|
if (MACbIsRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PS))
|
|
return true;
|
|
|
|
// Disable PS
|
|
MACvRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PSEN);
|
|
|
|
// Check if SyncFlushOK
|
|
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
|
|
VNSvInPortB(dwIoBase + MAC_REG_PSCTL, &byOrgValue);
|
|
if (byOrgValue & PSCTL_WAKEDONE)
|
|
break;
|
|
}
|
|
if (ww == W_MAX_TIMEOUT) {
|
|
DBG_PORT80(0x36);
|
|
pr_debug(" DBG_PORT80(0x33)\n");
|
|
return false;
|
|
}
|
|
return true;
|
|
}
|
|
|
|
/*
|
|
* Description:
|
|
* Set the Key by MISCFIFO
|
|
*
|
|
* Parameters:
|
|
* In:
|
|
* dwIoBase - Base Address for MAC
|
|
*
|
|
* Out:
|
|
* none
|
|
*
|
|
* Return Value: none
|
|
*
|
|
*/
|
|
|
|
void MACvSetKeyEntry(void __iomem *dwIoBase, unsigned short wKeyCtl, unsigned int uEntryIdx,
|
|
unsigned int uKeyIdx, unsigned char *pbyAddr, u32 *pdwKey, unsigned char byLocalID)
|
|
{
|
|
unsigned short wOffset;
|
|
u32 dwData;
|
|
int ii;
|
|
|
|
if (byLocalID <= 1)
|
|
return;
|
|
|
|
pr_debug("MACvSetKeyEntry\n");
|
|
wOffset = MISCFIFO_KEYETRY0;
|
|
wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
|
|
|
|
dwData = 0;
|
|
dwData |= wKeyCtl;
|
|
dwData <<= 16;
|
|
dwData |= MAKEWORD(*(pbyAddr+4), *(pbyAddr+5));
|
|
pr_debug("1. wOffset: %d, Data: %X, KeyCtl:%X\n",
|
|
wOffset, dwData, wKeyCtl);
|
|
|
|
VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
|
|
VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
|
|
VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
|
|
wOffset++;
|
|
|
|
dwData = 0;
|
|
dwData |= *(pbyAddr+3);
|
|
dwData <<= 8;
|
|
dwData |= *(pbyAddr+2);
|
|
dwData <<= 8;
|
|
dwData |= *(pbyAddr+1);
|
|
dwData <<= 8;
|
|
dwData |= *(pbyAddr+0);
|
|
pr_debug("2. wOffset: %d, Data: %X\n", wOffset, dwData);
|
|
|
|
VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
|
|
VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
|
|
VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
|
|
wOffset++;
|
|
|
|
wOffset += (uKeyIdx * 4);
|
|
for (ii = 0; ii < 4; ii++) {
|
|
// always push 128 bits
|
|
pr_debug("3.(%d) wOffset: %d, Data: %X\n",
|
|
ii, wOffset+ii, *pdwKey);
|
|
VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
|
|
VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++);
|
|
VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Description:
|
|
* Disable the Key Entry by MISCFIFO
|
|
*
|
|
* Parameters:
|
|
* In:
|
|
* dwIoBase - Base Address for MAC
|
|
*
|
|
* Out:
|
|
* none
|
|
*
|
|
* Return Value: none
|
|
*
|
|
*/
|
|
void MACvDisableKeyEntry(void __iomem *dwIoBase, unsigned int uEntryIdx)
|
|
{
|
|
unsigned short wOffset;
|
|
|
|
wOffset = MISCFIFO_KEYETRY0;
|
|
wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
|
|
|
|
VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
|
|
VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, 0);
|
|
VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
|
|
}
|