linux/drivers/staging/tidspbridge/core
Omar Ramirez Luna e16a922a27 staging: tidspbridge: use prepare/unprepare on dsp clocks
This solves runtime failures while trying to enable WDT3 related
functionality on firmware load, however it does affect other clocks
controlled by the driver. Seen on 3.8-rc1.

CCF provides clk_prepare and clk_unprepare for enable and disable
operations respectively, this needs to be called in the correct
order while handling clocks.

Code path to enable/disable dsp clocks can still be reached from an
atomic context, hence we can't use clk_prepare_enable and
clk_disable_unprepare yet.

Signed-off-by: Omar Ramirez Luna <omar.ramirez@copitl.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-01-07 15:03:56 -08:00
..
_cmm.h
_deh.h staging: tidspbridge: set8 remove hungarian from structs 2011-02-04 20:12:22 -06:00
_msg_sm.h staging: tidspbridge: set11 remove hungarian from structs 2011-02-04 20:12:28 -06:00
_tiomap.h staging: tidspbridge: Fix build breakage due to splitting CM functions. 2013-01-07 15:02:37 -08:00
_tiomap_pwr.h staging: tidspbridge: remove IN modifier 2010-07-22 14:41:04 -07:00
chnl_sm.c staging: tidspbridge: move the dereference below the NULL test 2012-09-07 22:02:20 -07:00
dsp-clock.c staging: tidspbridge: use prepare/unprepare on dsp clocks 2013-01-07 15:03:56 -08:00
io_sm.c staging: tidspbridge: Fix typos. 2012-08-13 19:06:59 -07:00
msg_sm.c staging: tidspbridge: remove dbc.h 2012-02-09 09:38:19 -08:00
sync.c staging: tidspbridge: Fix typos. 2012-08-13 19:06:59 -07:00
tiomap3430.c staging: tidspbridge: ioremap dsp sync addr 2012-10-24 16:31:31 -07:00
tiomap3430_pwr.c ARM: soc: general cleanups 2012-10-01 18:19:05 -07:00
tiomap_io.c ARM: omap: move platform_data definitions 2012-09-19 17:39:52 +02:00
tiomap_io.h staging: tidspbridge: remove OUT define 2010-07-22 14:41:04 -07:00
ue_deh.c ARM: OMAP: Remove unnecessary inclusion of dmtimer.h 2012-11-16 10:35:08 -06:00
wdt.c staging: tidspbridge: use prepare/unprepare on dsp clocks 2013-01-07 15:03:56 -08:00