96c5590058
The 'latency timer' of PCI devices, both Type 0 and Type 1, is setup in architecture-specific code [see: 'pcibios_set_master()']. There are two approaches being taken by all the architectures - check if the 'latency timer' is currently set between 16 and 255 and if not bring it within bounds, or, do nothing (and then there is the gratuitously different PA-RISC implementation). There is nothing architecture-specific about PCI's 'latency timer' so this patch pulls its setup functionality up into the PCI core by creating a generic 'pcibios_set_master()' function using the '__weak' attribute which can be used by all architectures as a default which, if necessary, can then be over-ridden by architecture-specific code. No functional change. Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
78 lines
2.1 KiB
C
78 lines
2.1 KiB
C
/* ASB2305 Arch-specific PCI declarations
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*
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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* Derived from: arch/i386/kernel/pci-i386.h: (c) 1999 Martin Mares <mj@ucw.cz>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#ifndef _PCI_ASB2305_H
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#define _PCI_ASB2305_H
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#undef DEBUG
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#ifdef DEBUG
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#define DBG(x...) printk(x)
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#else
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#define DBG(x...)
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#endif
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#define PCI_PROBE_BIOS 1
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#define PCI_PROBE_CONF1 2
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#define PCI_PROBE_CONF2 4
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#define PCI_NO_CHECKS 0x400
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#define PCI_ASSIGN_ROMS 0x1000
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#define PCI_BIOS_IRQ_SCAN 0x2000
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extern unsigned int pci_probe;
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/* pci-asb2305.c */
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extern void pcibios_resource_survey(void);
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/* pci.c */
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extern int pcibios_last_bus;
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extern struct pci_bus *pci_root_bus;
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extern struct pci_ops *pci_root_ops;
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extern struct irq_routing_table *pcibios_get_irq_routing_table(void);
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extern int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq);
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/* pci-irq.c */
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struct irq_info {
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u8 bus, devfn; /* Bus, device and function */
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struct {
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u8 link; /* IRQ line ID, chipset dependent,
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* 0=not routed */
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u16 bitmap; /* Available IRQs */
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} __attribute__((packed)) irq[4];
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u8 slot; /* Slot number, 0=onboard */
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u8 rfu;
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} __attribute__((packed));
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struct irq_routing_table {
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u32 signature; /* PIRQ_SIGNATURE should be here */
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u16 version; /* PIRQ_VERSION */
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u16 size; /* Table size in bytes */
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u8 rtr_bus, rtr_devfn; /* Where the interrupt router lies */
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u16 exclusive_irqs; /* IRQs devoted exclusively to PCI usage */
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u16 rtr_vendor, rtr_device; /* Vendor and device ID of interrupt router */
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u32 miniport_data; /* Crap */
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u8 rfu[11];
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u8 checksum; /* Modulo 256 checksum must give zero */
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struct irq_info slots[0];
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} __attribute__((packed));
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extern unsigned int pcibios_irq_mask;
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extern void pcibios_irq_init(void);
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extern void pcibios_fixup_irqs(void);
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extern void pcibios_enable_irq(struct pci_dev *dev);
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#endif /* PCI_ASB2305_H */
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