db695c0509
Mark Brand reports that a NEEDS_SYSCALL_FOR_CMPXCHG enabled kernel would open a security hole in the ghost syscall used to implement cmpxchg, as it fails to validate the user pointer. However, in order for this option to be enabled, you'd need to be building a pre-ARMv6 kernel with SMP support. There is only one system known which fits that, which is an early ARM SMP FPGA implementation based on the ARM926T. In any case, the Kconfig does not allow SMP to be enabled for pre-ARMv6 systems. Moreover, even if NEEDS_SYSCALL_FOR_CMPXCHG were to be enabled, the kernel would not build as __ARM_NR_cmpxchg64 is not defined. The simple answer is to remove the buggy code. Reported-by: Mark Brand <markbrand@google.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
829 lines
20 KiB
C
829 lines
20 KiB
C
/*
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* linux/arch/arm/kernel/traps.c
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*
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* Copyright (C) 1995-2009 Russell King
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* Fragments that appear the same as linux/arch/i386/kernel/traps.c (C) Linus Torvalds
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* 'traps.c' handles hardware exceptions after we have saved some state in
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* 'linux/arch/arm/lib/traps.S'. Mostly a debugging aid, but will probably
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* kill the offending process.
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*/
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#include <linux/signal.h>
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#include <linux/personality.h>
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#include <linux/kallsyms.h>
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#include <linux/spinlock.h>
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#include <linux/uaccess.h>
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#include <linux/hardirq.h>
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#include <linux/kdebug.h>
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#include <linux/module.h>
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#include <linux/kexec.h>
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#include <linux/bug.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/irq.h>
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#include <linux/atomic.h>
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#include <asm/cacheflush.h>
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#include <asm/exception.h>
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#include <asm/unistd.h>
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#include <asm/traps.h>
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#include <asm/ptrace.h>
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#include <asm/unwind.h>
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#include <asm/tls.h>
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#include <asm/system_misc.h>
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#include <asm/opcodes.h>
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|
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static const char *handler[]= {
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"prefetch abort",
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"data abort",
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"address exception",
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"interrupt",
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"undefined instruction",
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};
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void *vectors_page;
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#ifdef CONFIG_DEBUG_USER
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unsigned int user_debug;
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static int __init user_debug_setup(char *str)
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{
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get_option(&str, &user_debug);
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return 1;
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}
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__setup("user_debug=", user_debug_setup);
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#endif
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static void dump_mem(const char *, const char *, unsigned long, unsigned long);
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void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame)
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{
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#ifdef CONFIG_KALLSYMS
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printk("[<%08lx>] (%ps) from [<%08lx>] (%pS)\n", where, (void *)where, from, (void *)from);
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#else
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printk("Function entered at [<%08lx>] from [<%08lx>]\n", where, from);
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#endif
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if (in_exception_text(where))
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dump_mem("", "Exception stack", frame + 4, frame + 4 + sizeof(struct pt_regs));
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}
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#ifndef CONFIG_ARM_UNWIND
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/*
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* Stack pointers should always be within the kernels view of
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* physical memory. If it is not there, then we can't dump
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* out any information relating to the stack.
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*/
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static int verify_stack(unsigned long sp)
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{
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if (sp < PAGE_OFFSET ||
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(sp > (unsigned long)high_memory && high_memory != NULL))
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return -EFAULT;
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return 0;
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}
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#endif
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/*
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* Dump out the contents of some memory nicely...
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*/
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static void dump_mem(const char *lvl, const char *str, unsigned long bottom,
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unsigned long top)
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{
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unsigned long first;
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mm_segment_t fs;
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int i;
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/*
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* We need to switch to kernel mode so that we can use __get_user
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* to safely read from kernel space. Note that we now dump the
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* code first, just in case the backtrace kills us.
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*/
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fs = get_fs();
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set_fs(KERNEL_DS);
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printk("%s%s(0x%08lx to 0x%08lx)\n", lvl, str, bottom, top);
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for (first = bottom & ~31; first < top; first += 32) {
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unsigned long p;
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char str[sizeof(" 12345678") * 8 + 1];
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memset(str, ' ', sizeof(str));
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str[sizeof(str) - 1] = '\0';
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for (p = first, i = 0; i < 8 && p < top; i++, p += 4) {
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if (p >= bottom && p < top) {
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unsigned long val;
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if (__get_user(val, (unsigned long *)p) == 0)
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sprintf(str + i * 9, " %08lx", val);
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else
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sprintf(str + i * 9, " ????????");
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}
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}
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printk("%s%04lx:%s\n", lvl, first & 0xffff, str);
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}
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set_fs(fs);
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}
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static void dump_instr(const char *lvl, struct pt_regs *regs)
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{
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unsigned long addr = instruction_pointer(regs);
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const int thumb = thumb_mode(regs);
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const int width = thumb ? 4 : 8;
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mm_segment_t fs;
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char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str;
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int i;
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/*
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* We need to switch to kernel mode so that we can use __get_user
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* to safely read from kernel space. Note that we now dump the
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* code first, just in case the backtrace kills us.
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*/
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fs = get_fs();
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set_fs(KERNEL_DS);
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for (i = -4; i < 1 + !!thumb; i++) {
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unsigned int val, bad;
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if (thumb)
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bad = __get_user(val, &((u16 *)addr)[i]);
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else
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bad = __get_user(val, &((u32 *)addr)[i]);
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if (!bad)
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p += sprintf(p, i == 0 ? "(%0*x) " : "%0*x ",
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width, val);
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else {
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p += sprintf(p, "bad PC value");
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break;
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}
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}
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printk("%sCode: %s\n", lvl, str);
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set_fs(fs);
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}
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#ifdef CONFIG_ARM_UNWIND
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static inline void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
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{
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unwind_backtrace(regs, tsk);
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}
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#else
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static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
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{
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unsigned int fp, mode;
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int ok = 1;
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printk("Backtrace: ");
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if (!tsk)
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tsk = current;
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if (regs) {
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fp = frame_pointer(regs);
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mode = processor_mode(regs);
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} else if (tsk != current) {
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fp = thread_saved_fp(tsk);
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mode = 0x10;
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} else {
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asm("mov %0, fp" : "=r" (fp) : : "cc");
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mode = 0x10;
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}
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if (!fp) {
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pr_cont("no frame pointer");
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ok = 0;
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} else if (verify_stack(fp)) {
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pr_cont("invalid frame pointer 0x%08x", fp);
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ok = 0;
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} else if (fp < (unsigned long)end_of_stack(tsk))
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pr_cont("frame pointer underflow");
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pr_cont("\n");
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if (ok)
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c_backtrace(fp, mode);
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}
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#endif
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void show_stack(struct task_struct *tsk, unsigned long *sp)
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{
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dump_backtrace(NULL, tsk);
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barrier();
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}
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#ifdef CONFIG_PREEMPT
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#define S_PREEMPT " PREEMPT"
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#else
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#define S_PREEMPT ""
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#endif
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#ifdef CONFIG_SMP
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#define S_SMP " SMP"
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#else
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#define S_SMP ""
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#endif
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#ifdef CONFIG_THUMB2_KERNEL
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#define S_ISA " THUMB2"
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#else
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#define S_ISA " ARM"
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#endif
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static int __die(const char *str, int err, struct pt_regs *regs)
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{
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struct task_struct *tsk = current;
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static int die_counter;
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int ret;
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pr_emerg("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP S_ISA "\n",
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str, err, ++die_counter);
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/* trap and error numbers are mostly meaningless on ARM */
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ret = notify_die(DIE_OOPS, str, regs, err, tsk->thread.trap_no, SIGSEGV);
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if (ret == NOTIFY_STOP)
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return 1;
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print_modules();
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__show_regs(regs);
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pr_emerg("Process %.*s (pid: %d, stack limit = 0x%p)\n",
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TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk), end_of_stack(tsk));
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if (!user_mode(regs) || in_interrupt()) {
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dump_mem(KERN_EMERG, "Stack: ", regs->ARM_sp,
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THREAD_SIZE + (unsigned long)task_stack_page(tsk));
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dump_backtrace(regs, tsk);
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dump_instr(KERN_EMERG, regs);
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}
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return 0;
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}
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static arch_spinlock_t die_lock = __ARCH_SPIN_LOCK_UNLOCKED;
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static int die_owner = -1;
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static unsigned int die_nest_count;
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static unsigned long oops_begin(void)
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{
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int cpu;
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unsigned long flags;
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oops_enter();
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/* racy, but better than risking deadlock. */
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raw_local_irq_save(flags);
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cpu = smp_processor_id();
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if (!arch_spin_trylock(&die_lock)) {
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if (cpu == die_owner)
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/* nested oops. should stop eventually */;
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else
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arch_spin_lock(&die_lock);
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}
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die_nest_count++;
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die_owner = cpu;
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console_verbose();
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bust_spinlocks(1);
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return flags;
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}
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static void oops_end(unsigned long flags, struct pt_regs *regs, int signr)
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{
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if (regs && kexec_should_crash(current))
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crash_kexec(regs);
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bust_spinlocks(0);
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die_owner = -1;
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add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
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die_nest_count--;
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if (!die_nest_count)
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/* Nest count reaches zero, release the lock. */
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arch_spin_unlock(&die_lock);
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raw_local_irq_restore(flags);
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oops_exit();
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if (in_interrupt())
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panic("Fatal exception in interrupt");
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if (panic_on_oops)
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panic("Fatal exception");
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if (signr)
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do_exit(signr);
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}
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|
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/*
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* This function is protected against re-entrancy.
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*/
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void die(const char *str, struct pt_regs *regs, int err)
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{
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enum bug_trap_type bug_type = BUG_TRAP_TYPE_NONE;
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unsigned long flags = oops_begin();
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int sig = SIGSEGV;
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if (!user_mode(regs))
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bug_type = report_bug(regs->ARM_pc, regs);
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if (bug_type != BUG_TRAP_TYPE_NONE)
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str = "Oops - BUG";
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|
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if (__die(str, err, regs))
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sig = 0;
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oops_end(flags, regs, sig);
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}
|
|
|
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void arm_notify_die(const char *str, struct pt_regs *regs,
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struct siginfo *info, unsigned long err, unsigned long trap)
|
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{
|
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if (user_mode(regs)) {
|
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current->thread.error_code = err;
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current->thread.trap_no = trap;
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force_sig_info(info->si_signo, info, current);
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} else {
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die(str, regs, err);
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}
|
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}
|
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|
|
#ifdef CONFIG_GENERIC_BUG
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int is_valid_bugaddr(unsigned long pc)
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{
|
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#ifdef CONFIG_THUMB2_KERNEL
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u16 bkpt;
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u16 insn = __opcode_to_mem_thumb16(BUG_INSTR_VALUE);
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#else
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u32 bkpt;
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u32 insn = __opcode_to_mem_arm(BUG_INSTR_VALUE);
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#endif
|
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|
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if (probe_kernel_address((unsigned *)pc, bkpt))
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return 0;
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|
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return bkpt == insn;
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}
|
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|
|
#endif
|
|
|
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static LIST_HEAD(undef_hook);
|
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static DEFINE_RAW_SPINLOCK(undef_lock);
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|
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void register_undef_hook(struct undef_hook *hook)
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{
|
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unsigned long flags;
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|
|
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raw_spin_lock_irqsave(&undef_lock, flags);
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list_add(&hook->node, &undef_hook);
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raw_spin_unlock_irqrestore(&undef_lock, flags);
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}
|
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|
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void unregister_undef_hook(struct undef_hook *hook)
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{
|
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unsigned long flags;
|
|
|
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raw_spin_lock_irqsave(&undef_lock, flags);
|
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list_del(&hook->node);
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raw_spin_unlock_irqrestore(&undef_lock, flags);
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}
|
|
|
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static int call_undef_hook(struct pt_regs *regs, unsigned int instr)
|
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{
|
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struct undef_hook *hook;
|
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unsigned long flags;
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int (*fn)(struct pt_regs *regs, unsigned int instr) = NULL;
|
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|
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raw_spin_lock_irqsave(&undef_lock, flags);
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list_for_each_entry(hook, &undef_hook, node)
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if ((instr & hook->instr_mask) == hook->instr_val &&
|
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(regs->ARM_cpsr & hook->cpsr_mask) == hook->cpsr_val)
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fn = hook->fn;
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raw_spin_unlock_irqrestore(&undef_lock, flags);
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|
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return fn ? fn(regs, instr) : 1;
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}
|
|
|
|
asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
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{
|
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unsigned int instr;
|
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siginfo_t info;
|
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void __user *pc;
|
|
|
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pc = (void __user *)instruction_pointer(regs);
|
|
|
|
if (processor_mode(regs) == SVC_MODE) {
|
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#ifdef CONFIG_THUMB2_KERNEL
|
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if (thumb_mode(regs)) {
|
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instr = __mem_to_opcode_thumb16(((u16 *)pc)[0]);
|
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if (is_wide_instruction(instr)) {
|
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u16 inst2;
|
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inst2 = __mem_to_opcode_thumb16(((u16 *)pc)[1]);
|
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instr = __opcode_thumb32_compose(instr, inst2);
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}
|
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} else
|
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#endif
|
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instr = __mem_to_opcode_arm(*(u32 *) pc);
|
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} else if (thumb_mode(regs)) {
|
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if (get_user(instr, (u16 __user *)pc))
|
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goto die_sig;
|
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instr = __mem_to_opcode_thumb16(instr);
|
|
if (is_wide_instruction(instr)) {
|
|
unsigned int instr2;
|
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if (get_user(instr2, (u16 __user *)pc+1))
|
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goto die_sig;
|
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instr2 = __mem_to_opcode_thumb16(instr2);
|
|
instr = __opcode_thumb32_compose(instr, instr2);
|
|
}
|
|
} else {
|
|
if (get_user(instr, (u32 __user *)pc))
|
|
goto die_sig;
|
|
instr = __mem_to_opcode_arm(instr);
|
|
}
|
|
|
|
if (call_undef_hook(regs, instr) == 0)
|
|
return;
|
|
|
|
die_sig:
|
|
#ifdef CONFIG_DEBUG_USER
|
|
if (user_debug & UDBG_UNDEFINED) {
|
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pr_info("%s (%d): undefined instruction: pc=%p\n",
|
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current->comm, task_pid_nr(current), pc);
|
|
__show_regs(regs);
|
|
dump_instr(KERN_INFO, regs);
|
|
}
|
|
#endif
|
|
|
|
info.si_signo = SIGILL;
|
|
info.si_errno = 0;
|
|
info.si_code = ILL_ILLOPC;
|
|
info.si_addr = pc;
|
|
|
|
arm_notify_die("Oops - undefined instruction", regs, &info, 0, 6);
|
|
}
|
|
|
|
/*
|
|
* Handle FIQ similarly to NMI on x86 systems.
|
|
*
|
|
* The runtime environment for NMIs is extremely restrictive
|
|
* (NMIs can pre-empt critical sections meaning almost all locking is
|
|
* forbidden) meaning this default FIQ handling must only be used in
|
|
* circumstances where non-maskability improves robustness, such as
|
|
* watchdog or debug logic.
|
|
*
|
|
* This handler is not appropriate for general purpose use in drivers
|
|
* platform code and can be overrideen using set_fiq_handler.
|
|
*/
|
|
asmlinkage void __exception_irq_entry handle_fiq_as_nmi(struct pt_regs *regs)
|
|
{
|
|
struct pt_regs *old_regs = set_irq_regs(regs);
|
|
|
|
nmi_enter();
|
|
|
|
/* nop. FIQ handlers for special arch/arm features can be added here. */
|
|
|
|
nmi_exit();
|
|
|
|
set_irq_regs(old_regs);
|
|
}
|
|
|
|
/*
|
|
* bad_mode handles the impossible case in the vectors. If you see one of
|
|
* these, then it's extremely serious, and could mean you have buggy hardware.
|
|
* It never returns, and never tries to sync. We hope that we can at least
|
|
* dump out some state information...
|
|
*/
|
|
asmlinkage void bad_mode(struct pt_regs *regs, int reason)
|
|
{
|
|
console_verbose();
|
|
|
|
pr_crit("Bad mode in %s handler detected\n", handler[reason]);
|
|
|
|
die("Oops - bad mode", regs, 0);
|
|
local_irq_disable();
|
|
panic("bad mode");
|
|
}
|
|
|
|
static int bad_syscall(int n, struct pt_regs *regs)
|
|
{
|
|
siginfo_t info;
|
|
|
|
if ((current->personality & PER_MASK) != PER_LINUX) {
|
|
send_sig(SIGSEGV, current, 1);
|
|
return regs->ARM_r0;
|
|
}
|
|
|
|
#ifdef CONFIG_DEBUG_USER
|
|
if (user_debug & UDBG_SYSCALL) {
|
|
pr_err("[%d] %s: obsolete system call %08x.\n",
|
|
task_pid_nr(current), current->comm, n);
|
|
dump_instr(KERN_ERR, regs);
|
|
}
|
|
#endif
|
|
|
|
info.si_signo = SIGILL;
|
|
info.si_errno = 0;
|
|
info.si_code = ILL_ILLTRP;
|
|
info.si_addr = (void __user *)instruction_pointer(regs) -
|
|
(thumb_mode(regs) ? 2 : 4);
|
|
|
|
arm_notify_die("Oops - bad syscall", regs, &info, n, 0);
|
|
|
|
return regs->ARM_r0;
|
|
}
|
|
|
|
static inline int
|
|
__do_cache_op(unsigned long start, unsigned long end)
|
|
{
|
|
int ret;
|
|
|
|
do {
|
|
unsigned long chunk = min(PAGE_SIZE, end - start);
|
|
|
|
if (fatal_signal_pending(current))
|
|
return 0;
|
|
|
|
ret = flush_cache_user_range(start, start + chunk);
|
|
if (ret)
|
|
return ret;
|
|
|
|
cond_resched();
|
|
start += chunk;
|
|
} while (start < end);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static inline int
|
|
do_cache_op(unsigned long start, unsigned long end, int flags)
|
|
{
|
|
if (end < start || flags)
|
|
return -EINVAL;
|
|
|
|
if (!access_ok(VERIFY_READ, start, end - start))
|
|
return -EFAULT;
|
|
|
|
return __do_cache_op(start, end);
|
|
}
|
|
|
|
/*
|
|
* Handle all unrecognised system calls.
|
|
* 0x9f0000 - 0x9fffff are some more esoteric system calls
|
|
*/
|
|
#define NR(x) ((__ARM_NR_##x) - __ARM_NR_BASE)
|
|
asmlinkage int arm_syscall(int no, struct pt_regs *regs)
|
|
{
|
|
siginfo_t info;
|
|
|
|
if ((no >> 16) != (__ARM_NR_BASE>> 16))
|
|
return bad_syscall(no, regs);
|
|
|
|
switch (no & 0xffff) {
|
|
case 0: /* branch through 0 */
|
|
info.si_signo = SIGSEGV;
|
|
info.si_errno = 0;
|
|
info.si_code = SEGV_MAPERR;
|
|
info.si_addr = NULL;
|
|
|
|
arm_notify_die("branch through zero", regs, &info, 0, 0);
|
|
return 0;
|
|
|
|
case NR(breakpoint): /* SWI BREAK_POINT */
|
|
regs->ARM_pc -= thumb_mode(regs) ? 2 : 4;
|
|
ptrace_break(current, regs);
|
|
return regs->ARM_r0;
|
|
|
|
/*
|
|
* Flush a region from virtual address 'r0' to virtual address 'r1'
|
|
* _exclusive_. There is no alignment requirement on either address;
|
|
* user space does not need to know the hardware cache layout.
|
|
*
|
|
* r2 contains flags. It should ALWAYS be passed as ZERO until it
|
|
* is defined to be something else. For now we ignore it, but may
|
|
* the fires of hell burn in your belly if you break this rule. ;)
|
|
*
|
|
* (at a later date, we may want to allow this call to not flush
|
|
* various aspects of the cache. Passing '0' will guarantee that
|
|
* everything necessary gets flushed to maintain consistency in
|
|
* the specified region).
|
|
*/
|
|
case NR(cacheflush):
|
|
return do_cache_op(regs->ARM_r0, regs->ARM_r1, regs->ARM_r2);
|
|
|
|
case NR(usr26):
|
|
if (!(elf_hwcap & HWCAP_26BIT))
|
|
break;
|
|
regs->ARM_cpsr &= ~MODE32_BIT;
|
|
return regs->ARM_r0;
|
|
|
|
case NR(usr32):
|
|
if (!(elf_hwcap & HWCAP_26BIT))
|
|
break;
|
|
regs->ARM_cpsr |= MODE32_BIT;
|
|
return regs->ARM_r0;
|
|
|
|
case NR(set_tls):
|
|
set_tls(regs->ARM_r0);
|
|
return 0;
|
|
|
|
default:
|
|
/* Calls 9f00xx..9f07ff are defined to return -ENOSYS
|
|
if not implemented, rather than raising SIGILL. This
|
|
way the calling program can gracefully determine whether
|
|
a feature is supported. */
|
|
if ((no & 0xffff) <= 0x7ff)
|
|
return -ENOSYS;
|
|
break;
|
|
}
|
|
#ifdef CONFIG_DEBUG_USER
|
|
/*
|
|
* experience shows that these seem to indicate that
|
|
* something catastrophic has happened
|
|
*/
|
|
if (user_debug & UDBG_SYSCALL) {
|
|
pr_err("[%d] %s: arm syscall %d\n",
|
|
task_pid_nr(current), current->comm, no);
|
|
dump_instr("", regs);
|
|
if (user_mode(regs)) {
|
|
__show_regs(regs);
|
|
c_backtrace(frame_pointer(regs), processor_mode(regs));
|
|
}
|
|
}
|
|
#endif
|
|
info.si_signo = SIGILL;
|
|
info.si_errno = 0;
|
|
info.si_code = ILL_ILLTRP;
|
|
info.si_addr = (void __user *)instruction_pointer(regs) -
|
|
(thumb_mode(regs) ? 2 : 4);
|
|
|
|
arm_notify_die("Oops - bad syscall(2)", regs, &info, no, 0);
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_TLS_REG_EMUL
|
|
|
|
/*
|
|
* We might be running on an ARMv6+ processor which should have the TLS
|
|
* register but for some reason we can't use it, or maybe an SMP system
|
|
* using a pre-ARMv6 processor (there are apparently a few prototypes like
|
|
* that in existence) and therefore access to that register must be
|
|
* emulated.
|
|
*/
|
|
|
|
static int get_tp_trap(struct pt_regs *regs, unsigned int instr)
|
|
{
|
|
int reg = (instr >> 12) & 15;
|
|
if (reg == 15)
|
|
return 1;
|
|
regs->uregs[reg] = current_thread_info()->tp_value[0];
|
|
regs->ARM_pc += 4;
|
|
return 0;
|
|
}
|
|
|
|
static struct undef_hook arm_mrc_hook = {
|
|
.instr_mask = 0x0fff0fff,
|
|
.instr_val = 0x0e1d0f70,
|
|
.cpsr_mask = PSR_T_BIT,
|
|
.cpsr_val = 0,
|
|
.fn = get_tp_trap,
|
|
};
|
|
|
|
static int __init arm_mrc_hook_init(void)
|
|
{
|
|
register_undef_hook(&arm_mrc_hook);
|
|
return 0;
|
|
}
|
|
|
|
late_initcall(arm_mrc_hook_init);
|
|
|
|
#endif
|
|
|
|
/*
|
|
* A data abort trap was taken, but we did not handle the instruction.
|
|
* Try to abort the user program, or panic if it was the kernel.
|
|
*/
|
|
asmlinkage void
|
|
baddataabort(int code, unsigned long instr, struct pt_regs *regs)
|
|
{
|
|
unsigned long addr = instruction_pointer(regs);
|
|
siginfo_t info;
|
|
|
|
#ifdef CONFIG_DEBUG_USER
|
|
if (user_debug & UDBG_BADABORT) {
|
|
pr_err("[%d] %s: bad data abort: code %d instr 0x%08lx\n",
|
|
task_pid_nr(current), current->comm, code, instr);
|
|
dump_instr(KERN_ERR, regs);
|
|
show_pte(current->mm, addr);
|
|
}
|
|
#endif
|
|
|
|
info.si_signo = SIGILL;
|
|
info.si_errno = 0;
|
|
info.si_code = ILL_ILLOPC;
|
|
info.si_addr = (void __user *)addr;
|
|
|
|
arm_notify_die("unknown data abort code", regs, &info, instr, 0);
|
|
}
|
|
|
|
void __readwrite_bug(const char *fn)
|
|
{
|
|
pr_err("%s called, but not implemented\n", fn);
|
|
BUG();
|
|
}
|
|
EXPORT_SYMBOL(__readwrite_bug);
|
|
|
|
void __pte_error(const char *file, int line, pte_t pte)
|
|
{
|
|
pr_err("%s:%d: bad pte %08llx.\n", file, line, (long long)pte_val(pte));
|
|
}
|
|
|
|
void __pmd_error(const char *file, int line, pmd_t pmd)
|
|
{
|
|
pr_err("%s:%d: bad pmd %08llx.\n", file, line, (long long)pmd_val(pmd));
|
|
}
|
|
|
|
void __pgd_error(const char *file, int line, pgd_t pgd)
|
|
{
|
|
pr_err("%s:%d: bad pgd %08llx.\n", file, line, (long long)pgd_val(pgd));
|
|
}
|
|
|
|
asmlinkage void __div0(void)
|
|
{
|
|
pr_err("Division by zero in kernel.\n");
|
|
dump_stack();
|
|
}
|
|
EXPORT_SYMBOL(__div0);
|
|
|
|
void abort(void)
|
|
{
|
|
BUG();
|
|
|
|
/* if that doesn't kill us, halt */
|
|
panic("Oops failed to kill thread");
|
|
}
|
|
EXPORT_SYMBOL(abort);
|
|
|
|
void __init trap_init(void)
|
|
{
|
|
return;
|
|
}
|
|
|
|
#ifdef CONFIG_KUSER_HELPERS
|
|
static void __init kuser_init(void *vectors)
|
|
{
|
|
extern char __kuser_helper_start[], __kuser_helper_end[];
|
|
int kuser_sz = __kuser_helper_end - __kuser_helper_start;
|
|
|
|
memcpy(vectors + 0x1000 - kuser_sz, __kuser_helper_start, kuser_sz);
|
|
|
|
/*
|
|
* vectors + 0xfe0 = __kuser_get_tls
|
|
* vectors + 0xfe8 = hardware TLS instruction at 0xffff0fe8
|
|
*/
|
|
if (tls_emu || has_tls_reg)
|
|
memcpy(vectors + 0xfe0, vectors + 0xfe8, 4);
|
|
}
|
|
#else
|
|
static inline void __init kuser_init(void *vectors)
|
|
{
|
|
}
|
|
#endif
|
|
|
|
void __init early_trap_init(void *vectors_base)
|
|
{
|
|
#ifndef CONFIG_CPU_V7M
|
|
unsigned long vectors = (unsigned long)vectors_base;
|
|
extern char __stubs_start[], __stubs_end[];
|
|
extern char __vectors_start[], __vectors_end[];
|
|
unsigned i;
|
|
|
|
vectors_page = vectors_base;
|
|
|
|
/*
|
|
* Poison the vectors page with an undefined instruction. This
|
|
* instruction is chosen to be undefined for both ARM and Thumb
|
|
* ISAs. The Thumb version is an undefined instruction with a
|
|
* branch back to the undefined instruction.
|
|
*/
|
|
for (i = 0; i < PAGE_SIZE / sizeof(u32); i++)
|
|
((u32 *)vectors_base)[i] = 0xe7fddef1;
|
|
|
|
/*
|
|
* Copy the vectors, stubs and kuser helpers (in entry-armv.S)
|
|
* into the vector page, mapped at 0xffff0000, and ensure these
|
|
* are visible to the instruction stream.
|
|
*/
|
|
memcpy((void *)vectors, __vectors_start, __vectors_end - __vectors_start);
|
|
memcpy((void *)vectors + 0x1000, __stubs_start, __stubs_end - __stubs_start);
|
|
|
|
kuser_init(vectors_base);
|
|
|
|
flush_icache_range(vectors, vectors + PAGE_SIZE * 2);
|
|
#else /* ifndef CONFIG_CPU_V7M */
|
|
/*
|
|
* on V7-M there is no need to copy the vector table to a dedicated
|
|
* memory area. The address is configurable and so a table in the kernel
|
|
* image can be used.
|
|
*/
|
|
#endif
|
|
}
|