a1dafe857d
enable_IR_x2apic() calls setup_irq_remapping_ops() which by default installs the intel dmar remapping ops and then calls the amd iommu irq remapping prepare callback to figure out whether we are running on an AMD machine with irq remapping hardware. Right after that it calls irq_remapping_prepare() which pointlessly checks: if (!remap_ops || !remap_ops->prepare) return -ENODEV; and then calls remap_ops->prepare() which is silly in the AMD case as it got called from setup_irq_remapping_ops() already a few microseconds ago. Simplify this and just collapse everything into irq_remapping_prepare(). The irq_remapping_prepare() remains still silly as it assigns blindly the intel ops, but that's not scope of this patch. The scope here is to move the preperatory work, i.e. memory allocations out of the atomic section which is required to enable irq remapping. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Borislav Petkov <bp@alien8.de> Acked-and-tested-by: Joerg Roedel <joro@8bytes.org> Cc: Tony Luck <tony.luck@intel.com> Cc: iommu@lists.linux-foundation.org Cc: Joerg Roedel <jroedel@suse.de> Cc: H. Peter Anvin <hpa@linux.intel.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: David Rientjes <rientjes@google.com> Cc: HATAYAMA Daisuke <d.hatayama@jp.fujitsu.com> Cc: Jan Beulich <JBeulich@suse.com> Cc: Richard Weinberger <richard@nod.at> Cc: Oren Twaig <oren@scalemp.com> Cc: x86@kernel.org Link: http://lkml.kernel.org/r/20141205084147.232633738@linutronix.de Link: http://lkml.kernel.org/r/1420615903-28253-2-git-send-email-jiang.liu@linux.intel.com Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
386 lines
8.2 KiB
C
386 lines
8.2 KiB
C
#include <linux/seq_file.h>
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#include <linux/cpumask.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/errno.h>
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#include <linux/msi.h>
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#include <linux/irq.h>
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#include <linux/pci.h>
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#include <asm/hw_irq.h>
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#include <asm/irq_remapping.h>
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#include <asm/processor.h>
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#include <asm/x86_init.h>
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#include <asm/apic.h>
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#include <asm/hpet.h>
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#include "irq_remapping.h"
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int irq_remapping_enabled;
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int disable_irq_remap;
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int irq_remap_broken;
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int disable_sourceid_checking;
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int no_x2apic_optout;
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static struct irq_remap_ops *remap_ops;
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static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec);
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static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq,
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int index, int sub_handle);
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static int set_remapped_irq_affinity(struct irq_data *data,
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const struct cpumask *mask,
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bool force);
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static bool irq_remapped(struct irq_cfg *cfg)
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{
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return (cfg->remapped == 1);
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}
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static void irq_remapping_disable_io_apic(void)
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{
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/*
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* With interrupt-remapping, for now we will use virtual wire A
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* mode, as virtual wire B is little complex (need to configure
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* both IOAPIC RTE as well as interrupt-remapping table entry).
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* As this gets called during crash dump, keep this simple for
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* now.
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*/
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if (cpu_has_apic || apic_from_smp_config())
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disconnect_bsp_APIC(0);
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}
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static int do_setup_msi_irqs(struct pci_dev *dev, int nvec)
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{
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int ret, sub_handle, nvec_pow2, index = 0;
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unsigned int irq;
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struct msi_desc *msidesc;
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msidesc = list_entry(dev->msi_list.next, struct msi_desc, list);
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irq = irq_alloc_hwirqs(nvec, dev_to_node(&dev->dev));
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if (irq == 0)
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return -ENOSPC;
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nvec_pow2 = __roundup_pow_of_two(nvec);
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for (sub_handle = 0; sub_handle < nvec; sub_handle++) {
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if (!sub_handle) {
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index = msi_alloc_remapped_irq(dev, irq, nvec_pow2);
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if (index < 0) {
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ret = index;
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goto error;
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}
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} else {
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ret = msi_setup_remapped_irq(dev, irq + sub_handle,
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index, sub_handle);
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if (ret < 0)
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goto error;
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}
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ret = setup_msi_irq(dev, msidesc, irq, sub_handle);
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if (ret < 0)
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goto error;
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}
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return 0;
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error:
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irq_free_hwirqs(irq, nvec);
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/*
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* Restore altered MSI descriptor fields and prevent just destroyed
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* IRQs from tearing down again in default_teardown_msi_irqs()
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*/
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msidesc->irq = 0;
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return ret;
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}
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static int do_setup_msix_irqs(struct pci_dev *dev, int nvec)
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{
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int node, ret, sub_handle, index = 0;
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struct msi_desc *msidesc;
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unsigned int irq;
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node = dev_to_node(&dev->dev);
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sub_handle = 0;
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list_for_each_entry(msidesc, &dev->msi_list, list) {
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irq = irq_alloc_hwirq(node);
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if (irq == 0)
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return -1;
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if (sub_handle == 0)
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ret = index = msi_alloc_remapped_irq(dev, irq, nvec);
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else
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ret = msi_setup_remapped_irq(dev, irq, index, sub_handle);
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if (ret < 0)
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goto error;
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ret = setup_msi_irq(dev, msidesc, irq, 0);
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if (ret < 0)
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goto error;
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sub_handle += 1;
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irq += 1;
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}
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return 0;
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error:
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irq_free_hwirq(irq);
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return ret;
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}
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static int irq_remapping_setup_msi_irqs(struct pci_dev *dev,
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int nvec, int type)
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{
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if (type == PCI_CAP_ID_MSI)
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return do_setup_msi_irqs(dev, nvec);
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else
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return do_setup_msix_irqs(dev, nvec);
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}
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static void eoi_ioapic_pin_remapped(int apic, int pin, int vector)
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{
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/*
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* Intr-remapping uses pin number as the virtual vector
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* in the RTE. Actual vector is programmed in
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* intr-remapping table entry. Hence for the io-apic
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* EOI we use the pin number.
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*/
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io_apic_eoi(apic, pin);
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}
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static void __init irq_remapping_modify_x86_ops(void)
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{
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x86_io_apic_ops.disable = irq_remapping_disable_io_apic;
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x86_io_apic_ops.set_affinity = set_remapped_irq_affinity;
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x86_io_apic_ops.setup_entry = setup_ioapic_remapped_entry;
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x86_io_apic_ops.eoi_ioapic_pin = eoi_ioapic_pin_remapped;
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x86_msi.setup_msi_irqs = irq_remapping_setup_msi_irqs;
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x86_msi.setup_hpet_msi = setup_hpet_msi_remapped;
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x86_msi.compose_msi_msg = compose_remapped_msi_msg;
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}
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static __init int setup_nointremap(char *str)
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{
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disable_irq_remap = 1;
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return 0;
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}
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early_param("nointremap", setup_nointremap);
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static __init int setup_irqremap(char *str)
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{
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if (!str)
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return -EINVAL;
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while (*str) {
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if (!strncmp(str, "on", 2))
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disable_irq_remap = 0;
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else if (!strncmp(str, "off", 3))
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disable_irq_remap = 1;
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else if (!strncmp(str, "nosid", 5))
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disable_sourceid_checking = 1;
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else if (!strncmp(str, "no_x2apic_optout", 16))
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no_x2apic_optout = 1;
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str += strcspn(str, ",");
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while (*str == ',')
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str++;
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}
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return 0;
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}
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early_param("intremap", setup_irqremap);
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void set_irq_remapping_broken(void)
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{
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irq_remap_broken = 1;
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}
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int irq_remapping_supported(void)
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{
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if (disable_irq_remap)
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return 0;
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if (!remap_ops || !remap_ops->supported)
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return 0;
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return remap_ops->supported();
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}
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int __init irq_remapping_prepare(void)
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{
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remap_ops = &intel_irq_remap_ops;
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#ifdef CONFIG_AMD_IOMMU
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if (amd_iommu_irq_ops.prepare() == 0) {
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remap_ops = &amd_iommu_irq_ops;
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return 0;
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}
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#endif
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return remap_ops->prepare();
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}
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int __init irq_remapping_enable(void)
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{
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int ret;
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if (!remap_ops || !remap_ops->enable)
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return -ENODEV;
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ret = remap_ops->enable();
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if (irq_remapping_enabled)
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irq_remapping_modify_x86_ops();
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return ret;
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}
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void irq_remapping_disable(void)
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{
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if (!irq_remapping_enabled ||
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!remap_ops ||
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!remap_ops->disable)
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return;
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remap_ops->disable();
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}
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int irq_remapping_reenable(int mode)
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{
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if (!irq_remapping_enabled ||
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!remap_ops ||
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!remap_ops->reenable)
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return 0;
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return remap_ops->reenable(mode);
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}
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int __init irq_remap_enable_fault_handling(void)
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{
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if (!irq_remapping_enabled)
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return 0;
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if (!remap_ops || !remap_ops->enable_faulting)
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return -ENODEV;
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return remap_ops->enable_faulting();
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}
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int setup_ioapic_remapped_entry(int irq,
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struct IO_APIC_route_entry *entry,
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unsigned int destination, int vector,
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struct io_apic_irq_attr *attr)
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{
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if (!remap_ops || !remap_ops->setup_ioapic_entry)
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return -ENODEV;
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return remap_ops->setup_ioapic_entry(irq, entry, destination,
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vector, attr);
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}
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static int set_remapped_irq_affinity(struct irq_data *data,
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const struct cpumask *mask, bool force)
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{
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if (!config_enabled(CONFIG_SMP) || !remap_ops ||
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!remap_ops->set_affinity)
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return 0;
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return remap_ops->set_affinity(data, mask, force);
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}
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void free_remapped_irq(int irq)
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{
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struct irq_cfg *cfg = irq_cfg(irq);
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if (!remap_ops || !remap_ops->free_irq)
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return;
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if (irq_remapped(cfg))
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remap_ops->free_irq(irq);
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}
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void compose_remapped_msi_msg(struct pci_dev *pdev,
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unsigned int irq, unsigned int dest,
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struct msi_msg *msg, u8 hpet_id)
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{
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struct irq_cfg *cfg = irq_cfg(irq);
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if (!irq_remapped(cfg))
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native_compose_msi_msg(pdev, irq, dest, msg, hpet_id);
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else if (remap_ops && remap_ops->compose_msi_msg)
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remap_ops->compose_msi_msg(pdev, irq, dest, msg, hpet_id);
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}
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static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec)
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{
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if (!remap_ops || !remap_ops->msi_alloc_irq)
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return -ENODEV;
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return remap_ops->msi_alloc_irq(pdev, irq, nvec);
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}
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static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq,
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int index, int sub_handle)
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{
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if (!remap_ops || !remap_ops->msi_setup_irq)
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return -ENODEV;
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return remap_ops->msi_setup_irq(pdev, irq, index, sub_handle);
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}
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int setup_hpet_msi_remapped(unsigned int irq, unsigned int id)
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{
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int ret;
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if (!remap_ops || !remap_ops->alloc_hpet_msi)
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return -ENODEV;
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ret = remap_ops->alloc_hpet_msi(irq, id);
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if (ret)
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return -EINVAL;
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return default_setup_hpet_msi(irq, id);
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}
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void panic_if_irq_remap(const char *msg)
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{
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if (irq_remapping_enabled)
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panic(msg);
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}
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static void ir_ack_apic_edge(struct irq_data *data)
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{
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ack_APIC_irq();
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}
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static void ir_ack_apic_level(struct irq_data *data)
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{
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ack_APIC_irq();
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eoi_ioapic_irq(data->irq, irqd_cfg(data));
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}
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static void ir_print_prefix(struct irq_data *data, struct seq_file *p)
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{
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seq_printf(p, " IR-%s", data->chip->name);
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}
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void irq_remap_modify_chip_defaults(struct irq_chip *chip)
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{
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chip->irq_print_chip = ir_print_prefix;
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chip->irq_ack = ir_ack_apic_edge;
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chip->irq_eoi = ir_ack_apic_level;
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chip->irq_set_affinity = x86_io_apic_ops.set_affinity;
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}
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bool setup_remapped_irq(int irq, struct irq_cfg *cfg, struct irq_chip *chip)
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{
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if (!irq_remapped(cfg))
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return false;
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irq_set_status_flags(irq, IRQ_MOVE_PCNTXT);
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irq_remap_modify_chip_defaults(chip);
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return true;
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}
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