b8b0e465dd
By default NAND driver will choose the highest ecc strength that oob could contain, in this case, for some 8K+744 NAND flash, the ecc strength will be up to 52bit, which beyonds the i.MX6QDL BCH capability (40bit). This patch allows the NAND driver try to use minimum required ecc strength if it failed to use the highest ecc, even without explicitly claiming "fsl,use-minimum-ecc" in dts. Signed-off-by: Han Xu <b45815@freescale.com> Acked-by: Huang Shijie <shijie.huang@arm.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> |
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| .. | ||
| Makefile | ||
| bch-regs.h | ||
| gpmi-lib.c | ||
| gpmi-nand.c | ||
| gpmi-nand.h | ||
| gpmi-regs.h | ||