4277f2c466
This patch converts the drivers in drivers/video/* to use the module_platform_driver() macro which makes the code smaller and a bit simpler. Cc: Ben Dooks <ben@simtec.co.uk> Cc: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Axel Lin <axel.lin@gmail.com> Acked-by: Wan ZongShun <mcuos.com@gmail.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Lennert Buytenhek <buytenh@wantstofly.org> Acked-by: Alexey Charkov <alchark@gmail.com> Acked-by: Damian Hobson-Garcia <dhobsong@igel.co.jp> Acked-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
687 lines
17 KiB
C
687 lines
17 KiB
C
/*
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* SuperH Mobile MERAM Driver for SuperH Mobile LCDC Driver
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*
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* Copyright (c) 2011 Damian Hobson-Garcia <dhobsong@igel.co.jp>
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* Takanari Hayama <taki@igel.co.jp>
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/pm_runtime.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/platform_device.h>
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#include <video/sh_mobile_meram.h>
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/* meram registers */
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#define MEVCR1 0x4
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#define MEVCR1_RST (1 << 31)
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#define MEVCR1_WD (1 << 30)
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#define MEVCR1_AMD1 (1 << 29)
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#define MEVCR1_AMD0 (1 << 28)
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#define MEQSEL1 0x40
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#define MEQSEL2 0x44
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#define MExxCTL 0x400
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#define MExxCTL_BV (1 << 31)
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#define MExxCTL_BSZ_SHIFT 28
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#define MExxCTL_MSAR_MASK (0x7ff << MExxCTL_MSAR_SHIFT)
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#define MExxCTL_MSAR_SHIFT 16
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#define MExxCTL_NXT_MASK (0x1f << MExxCTL_NXT_SHIFT)
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#define MExxCTL_NXT_SHIFT 11
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#define MExxCTL_WD1 (1 << 10)
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#define MExxCTL_WD0 (1 << 9)
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#define MExxCTL_WS (1 << 8)
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#define MExxCTL_CB (1 << 7)
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#define MExxCTL_WBF (1 << 6)
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#define MExxCTL_WF (1 << 5)
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#define MExxCTL_RF (1 << 4)
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#define MExxCTL_CM (1 << 3)
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#define MExxCTL_MD_READ (1 << 0)
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#define MExxCTL_MD_WRITE (2 << 0)
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#define MExxCTL_MD_ICB_WB (3 << 0)
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#define MExxCTL_MD_ICB (4 << 0)
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#define MExxCTL_MD_FB (7 << 0)
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#define MExxCTL_MD_MASK (7 << 0)
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#define MExxBSIZE 0x404
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#define MExxBSIZE_RCNT_SHIFT 28
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#define MExxBSIZE_YSZM1_SHIFT 16
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#define MExxBSIZE_XSZM1_SHIFT 0
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#define MExxMNCF 0x408
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#define MExxMNCF_KWBNM_SHIFT 28
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#define MExxMNCF_KRBNM_SHIFT 24
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#define MExxMNCF_BNM_SHIFT 16
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#define MExxMNCF_XBV (1 << 15)
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#define MExxMNCF_CPL_YCBCR444 (1 << 12)
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#define MExxMNCF_CPL_YCBCR420 (2 << 12)
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#define MExxMNCF_CPL_YCBCR422 (3 << 12)
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#define MExxMNCF_CPL_MSK (3 << 12)
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#define MExxMNCF_BL (1 << 2)
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#define MExxMNCF_LNM_SHIFT 0
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#define MExxSARA 0x410
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#define MExxSARB 0x414
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#define MExxSBSIZE 0x418
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#define MExxSBSIZE_HDV (1 << 31)
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#define MExxSBSIZE_HSZ16 (0 << 28)
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#define MExxSBSIZE_HSZ32 (1 << 28)
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#define MExxSBSIZE_HSZ64 (2 << 28)
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#define MExxSBSIZE_HSZ128 (3 << 28)
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#define MExxSBSIZE_SBSIZZ_SHIFT 0
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#define MERAM_MExxCTL_VAL(next, addr) \
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((((next) << MExxCTL_NXT_SHIFT) & MExxCTL_NXT_MASK) | \
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(((addr) << MExxCTL_MSAR_SHIFT) & MExxCTL_MSAR_MASK))
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#define MERAM_MExxBSIZE_VAL(rcnt, yszm1, xszm1) \
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(((rcnt) << MExxBSIZE_RCNT_SHIFT) | \
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((yszm1) << MExxBSIZE_YSZM1_SHIFT) | \
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((xszm1) << MExxBSIZE_XSZM1_SHIFT))
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#define SH_MOBILE_MERAM_ICB_NUM 32
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static unsigned long common_regs[] = {
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MEVCR1,
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MEQSEL1,
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MEQSEL2,
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};
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#define CMN_REGS_SIZE ARRAY_SIZE(common_regs)
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static unsigned long icb_regs[] = {
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MExxCTL,
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MExxBSIZE,
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MExxMNCF,
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MExxSARA,
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MExxSARB,
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MExxSBSIZE,
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};
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#define ICB_REGS_SIZE ARRAY_SIZE(icb_regs)
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struct sh_mobile_meram_priv {
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void __iomem *base;
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struct mutex lock;
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unsigned long used_icb;
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int used_meram_cache_regions;
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unsigned long used_meram_cache[SH_MOBILE_MERAM_ICB_NUM];
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unsigned long cmn_saved_regs[CMN_REGS_SIZE];
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unsigned long icb_saved_regs[ICB_REGS_SIZE * SH_MOBILE_MERAM_ICB_NUM];
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};
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/* settings */
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#define MERAM_SEC_LINE 15
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#define MERAM_LINE_WIDTH 2048
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/*
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* MERAM/ICB access functions
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*/
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#define MERAM_ICB_OFFSET(base, idx, off) ((base) + (off) + (idx) * 0x20)
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static inline void meram_write_icb(void __iomem *base, int idx, int off,
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unsigned long val)
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{
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iowrite32(val, MERAM_ICB_OFFSET(base, idx, off));
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}
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static inline unsigned long meram_read_icb(void __iomem *base, int idx, int off)
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{
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return ioread32(MERAM_ICB_OFFSET(base, idx, off));
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}
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static inline void meram_write_reg(void __iomem *base, int off,
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unsigned long val)
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{
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iowrite32(val, base + off);
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}
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static inline unsigned long meram_read_reg(void __iomem *base, int off)
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{
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return ioread32(base + off);
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}
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/*
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* register ICB
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*/
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#define MERAM_CACHE_START(p) ((p) >> 16)
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#define MERAM_CACHE_END(p) ((p) & 0xffff)
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#define MERAM_CACHE_SET(o, s) ((((o) & 0xffff) << 16) | \
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(((o) + (s) - 1) & 0xffff))
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/*
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* check if there's no overlaps in MERAM allocation.
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*/
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static inline int meram_check_overlap(struct sh_mobile_meram_priv *priv,
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struct sh_mobile_meram_icb *new)
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{
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int i;
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int used_start, used_end, meram_start, meram_end;
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/* valid ICB? */
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if (new->marker_icb & ~0x1f || new->cache_icb & ~0x1f)
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return 1;
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if (test_bit(new->marker_icb, &priv->used_icb) ||
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test_bit(new->cache_icb, &priv->used_icb))
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return 1;
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for (i = 0; i < priv->used_meram_cache_regions; i++) {
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used_start = MERAM_CACHE_START(priv->used_meram_cache[i]);
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used_end = MERAM_CACHE_END(priv->used_meram_cache[i]);
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meram_start = new->meram_offset;
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meram_end = new->meram_offset + new->meram_size;
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if ((meram_start >= used_start && meram_start < used_end) ||
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(meram_end > used_start && meram_end < used_end))
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return 1;
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}
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return 0;
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}
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/*
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* mark the specified ICB as used
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*/
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static inline void meram_mark(struct sh_mobile_meram_priv *priv,
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struct sh_mobile_meram_icb *new)
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{
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int n;
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if (new->marker_icb < 0 || new->cache_icb < 0)
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return;
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__set_bit(new->marker_icb, &priv->used_icb);
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__set_bit(new->cache_icb, &priv->used_icb);
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n = priv->used_meram_cache_regions;
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priv->used_meram_cache[n] = MERAM_CACHE_SET(new->meram_offset,
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new->meram_size);
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priv->used_meram_cache_regions++;
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}
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/*
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* unmark the specified ICB as used
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*/
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static inline void meram_unmark(struct sh_mobile_meram_priv *priv,
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struct sh_mobile_meram_icb *icb)
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{
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int i;
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unsigned long pattern;
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if (icb->marker_icb < 0 || icb->cache_icb < 0)
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return;
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__clear_bit(icb->marker_icb, &priv->used_icb);
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__clear_bit(icb->cache_icb, &priv->used_icb);
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pattern = MERAM_CACHE_SET(icb->meram_offset, icb->meram_size);
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for (i = 0; i < priv->used_meram_cache_regions; i++) {
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if (priv->used_meram_cache[i] == pattern) {
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while (i < priv->used_meram_cache_regions - 1) {
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priv->used_meram_cache[i] =
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priv->used_meram_cache[i + 1] ;
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i++;
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}
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priv->used_meram_cache[i] = 0;
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priv->used_meram_cache_regions--;
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break;
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}
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}
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}
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/*
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* is this a YCbCr(NV12, NV16 or NV24) colorspace
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*/
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static inline int is_nvcolor(int cspace)
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{
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if (cspace == SH_MOBILE_MERAM_PF_NV ||
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cspace == SH_MOBILE_MERAM_PF_NV24)
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return 1;
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return 0;
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}
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/*
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* set the next address to fetch
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*/
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static inline void meram_set_next_addr(struct sh_mobile_meram_priv *priv,
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struct sh_mobile_meram_cfg *cfg,
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unsigned long base_addr_y,
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unsigned long base_addr_c)
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{
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unsigned long target;
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target = (cfg->current_reg) ? MExxSARA : MExxSARB;
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cfg->current_reg ^= 1;
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/* set the next address to fetch */
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meram_write_icb(priv->base, cfg->icb[0].cache_icb, target,
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base_addr_y);
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meram_write_icb(priv->base, cfg->icb[0].marker_icb, target,
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base_addr_y + cfg->icb[0].cache_unit);
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if (is_nvcolor(cfg->pixelformat)) {
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meram_write_icb(priv->base, cfg->icb[1].cache_icb, target,
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base_addr_c);
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meram_write_icb(priv->base, cfg->icb[1].marker_icb, target,
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base_addr_c + cfg->icb[1].cache_unit);
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}
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}
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/*
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* get the next ICB address
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*/
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static inline void meram_get_next_icb_addr(struct sh_mobile_meram_info *pdata,
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struct sh_mobile_meram_cfg *cfg,
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unsigned long *icb_addr_y,
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unsigned long *icb_addr_c)
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{
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unsigned long icb_offset;
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if (pdata->addr_mode == SH_MOBILE_MERAM_MODE0)
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icb_offset = 0x80000000 | (cfg->current_reg << 29);
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else
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icb_offset = 0xc0000000 | (cfg->current_reg << 23);
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*icb_addr_y = icb_offset | (cfg->icb[0].marker_icb << 24);
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if (is_nvcolor(cfg->pixelformat))
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*icb_addr_c = icb_offset | (cfg->icb[1].marker_icb << 24);
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}
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#define MERAM_CALC_BYTECOUNT(x, y) \
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(((x) * (y) + (MERAM_LINE_WIDTH - 1)) & ~(MERAM_LINE_WIDTH - 1))
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/*
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* initialize MERAM
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*/
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static int meram_init(struct sh_mobile_meram_priv *priv,
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struct sh_mobile_meram_icb *icb,
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int xres, int yres, int *out_pitch)
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{
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unsigned long total_byte_count = MERAM_CALC_BYTECOUNT(xres, yres);
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unsigned long bnm;
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int lcdc_pitch, xpitch, line_cnt;
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int save_lines;
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/* adjust pitch to 1024, 2048, 4096 or 8192 */
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lcdc_pitch = (xres - 1) | 1023;
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lcdc_pitch = lcdc_pitch | (lcdc_pitch >> 1);
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lcdc_pitch = lcdc_pitch | (lcdc_pitch >> 2);
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lcdc_pitch += 1;
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/* derive settings */
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if (lcdc_pitch == 8192 && yres >= 1024) {
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lcdc_pitch = xpitch = MERAM_LINE_WIDTH;
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line_cnt = total_byte_count >> 11;
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*out_pitch = xres;
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save_lines = (icb->meram_size / 16 / MERAM_SEC_LINE);
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save_lines *= MERAM_SEC_LINE;
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} else {
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xpitch = xres;
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line_cnt = yres;
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*out_pitch = lcdc_pitch;
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save_lines = icb->meram_size / (lcdc_pitch >> 10) / 2;
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save_lines &= 0xff;
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}
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bnm = (save_lines - 1) << 16;
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/* TODO: we better to check if we have enough MERAM buffer size */
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/* set up ICB */
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meram_write_icb(priv->base, icb->cache_icb, MExxBSIZE,
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MERAM_MExxBSIZE_VAL(0x0, line_cnt - 1, xpitch - 1));
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meram_write_icb(priv->base, icb->marker_icb, MExxBSIZE,
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MERAM_MExxBSIZE_VAL(0xf, line_cnt - 1, xpitch - 1));
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meram_write_icb(priv->base, icb->cache_icb, MExxMNCF, bnm);
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meram_write_icb(priv->base, icb->marker_icb, MExxMNCF, bnm);
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meram_write_icb(priv->base, icb->cache_icb, MExxSBSIZE, xpitch);
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meram_write_icb(priv->base, icb->marker_icb, MExxSBSIZE, xpitch);
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/* save a cache unit size */
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icb->cache_unit = xres * save_lines;
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/*
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* Set MERAM for framebuffer
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*
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* we also chain the cache_icb and the marker_icb.
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* we also split the allocated MERAM buffer between two ICBs.
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*/
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meram_write_icb(priv->base, icb->cache_icb, MExxCTL,
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MERAM_MExxCTL_VAL(icb->marker_icb, icb->meram_offset) |
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MExxCTL_WD1 | MExxCTL_WD0 | MExxCTL_WS | MExxCTL_CM |
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MExxCTL_MD_FB);
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meram_write_icb(priv->base, icb->marker_icb, MExxCTL,
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MERAM_MExxCTL_VAL(icb->cache_icb, icb->meram_offset +
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icb->meram_size / 2) |
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MExxCTL_WD1 | MExxCTL_WD0 | MExxCTL_WS | MExxCTL_CM |
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MExxCTL_MD_FB);
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return 0;
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}
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static void meram_deinit(struct sh_mobile_meram_priv *priv,
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struct sh_mobile_meram_icb *icb)
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{
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/* disable ICB */
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meram_write_icb(priv->base, icb->cache_icb, MExxCTL,
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MExxCTL_WBF | MExxCTL_WF | MExxCTL_RF);
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meram_write_icb(priv->base, icb->marker_icb, MExxCTL,
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MExxCTL_WBF | MExxCTL_WF | MExxCTL_RF);
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icb->cache_unit = 0;
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}
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/*
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* register the ICB
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*/
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static int sh_mobile_meram_register(struct sh_mobile_meram_info *pdata,
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struct sh_mobile_meram_cfg *cfg,
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int xres, int yres, int pixelformat,
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unsigned long base_addr_y,
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unsigned long base_addr_c,
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unsigned long *icb_addr_y,
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unsigned long *icb_addr_c,
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int *pitch)
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{
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struct platform_device *pdev;
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struct sh_mobile_meram_priv *priv;
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int n, out_pitch;
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int error = 0;
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if (!pdata || !pdata->priv || !pdata->pdev || !cfg)
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return -EINVAL;
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if (pixelformat != SH_MOBILE_MERAM_PF_NV &&
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pixelformat != SH_MOBILE_MERAM_PF_NV24 &&
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pixelformat != SH_MOBILE_MERAM_PF_RGB)
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return -EINVAL;
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priv = pdata->priv;
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pdev = pdata->pdev;
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dev_dbg(&pdev->dev, "registering %dx%d (%s) (y=%08lx, c=%08lx)",
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xres, yres, (!pixelformat) ? "yuv" : "rgb",
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base_addr_y, base_addr_c);
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/* we can't handle wider than 8192px */
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if (xres > 8192) {
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dev_err(&pdev->dev, "width exceeding the limit (> 8192).");
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return -EINVAL;
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}
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/* do we have at least one ICB config? */
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if (cfg->icb[0].marker_icb < 0 || cfg->icb[0].cache_icb < 0) {
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dev_err(&pdev->dev, "at least one ICB is required.");
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return -EINVAL;
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}
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mutex_lock(&priv->lock);
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if (priv->used_meram_cache_regions + 2 > SH_MOBILE_MERAM_ICB_NUM) {
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dev_err(&pdev->dev, "no more ICB available.");
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error = -EINVAL;
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goto err;
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}
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/* make sure that there's no overlaps */
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if (meram_check_overlap(priv, &cfg->icb[0])) {
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dev_err(&pdev->dev, "conflicting config detected.");
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error = -EINVAL;
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goto err;
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}
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n = 1;
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/* do the same if we have the second ICB set */
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if (cfg->icb[1].marker_icb >= 0 && cfg->icb[1].cache_icb >= 0) {
|
|
if (meram_check_overlap(priv, &cfg->icb[1])) {
|
|
dev_err(&pdev->dev, "conflicting config detected.");
|
|
error = -EINVAL;
|
|
goto err;
|
|
}
|
|
n = 2;
|
|
}
|
|
|
|
if (is_nvcolor(pixelformat) && n != 2) {
|
|
dev_err(&pdev->dev, "requires two ICB sets for planar Y/C.");
|
|
error = -EINVAL;
|
|
goto err;
|
|
}
|
|
|
|
/* we now register the ICB */
|
|
cfg->pixelformat = pixelformat;
|
|
meram_mark(priv, &cfg->icb[0]);
|
|
if (is_nvcolor(pixelformat))
|
|
meram_mark(priv, &cfg->icb[1]);
|
|
|
|
/* initialize MERAM */
|
|
meram_init(priv, &cfg->icb[0], xres, yres, &out_pitch);
|
|
*pitch = out_pitch;
|
|
if (pixelformat == SH_MOBILE_MERAM_PF_NV)
|
|
meram_init(priv, &cfg->icb[1], xres, (yres + 1) / 2,
|
|
&out_pitch);
|
|
else if (pixelformat == SH_MOBILE_MERAM_PF_NV24)
|
|
meram_init(priv, &cfg->icb[1], 2 * xres, (yres + 1) / 2,
|
|
&out_pitch);
|
|
|
|
cfg->current_reg = 1;
|
|
meram_set_next_addr(priv, cfg, base_addr_y, base_addr_c);
|
|
meram_get_next_icb_addr(pdata, cfg, icb_addr_y, icb_addr_c);
|
|
|
|
dev_dbg(&pdev->dev, "registered - can access via y=%08lx, c=%08lx",
|
|
*icb_addr_y, *icb_addr_c);
|
|
|
|
err:
|
|
mutex_unlock(&priv->lock);
|
|
return error;
|
|
}
|
|
|
|
static int sh_mobile_meram_unregister(struct sh_mobile_meram_info *pdata,
|
|
struct sh_mobile_meram_cfg *cfg)
|
|
{
|
|
struct sh_mobile_meram_priv *priv;
|
|
|
|
if (!pdata || !pdata->priv || !cfg)
|
|
return -EINVAL;
|
|
|
|
priv = pdata->priv;
|
|
|
|
mutex_lock(&priv->lock);
|
|
|
|
/* deinit & unmark */
|
|
if (is_nvcolor(cfg->pixelformat)) {
|
|
meram_deinit(priv, &cfg->icb[1]);
|
|
meram_unmark(priv, &cfg->icb[1]);
|
|
}
|
|
meram_deinit(priv, &cfg->icb[0]);
|
|
meram_unmark(priv, &cfg->icb[0]);
|
|
|
|
mutex_unlock(&priv->lock);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sh_mobile_meram_update(struct sh_mobile_meram_info *pdata,
|
|
struct sh_mobile_meram_cfg *cfg,
|
|
unsigned long base_addr_y,
|
|
unsigned long base_addr_c,
|
|
unsigned long *icb_addr_y,
|
|
unsigned long *icb_addr_c)
|
|
{
|
|
struct sh_mobile_meram_priv *priv;
|
|
|
|
if (!pdata || !pdata->priv || !cfg)
|
|
return -EINVAL;
|
|
|
|
priv = pdata->priv;
|
|
|
|
mutex_lock(&priv->lock);
|
|
|
|
meram_set_next_addr(priv, cfg, base_addr_y, base_addr_c);
|
|
meram_get_next_icb_addr(pdata, cfg, icb_addr_y, icb_addr_c);
|
|
|
|
mutex_unlock(&priv->lock);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sh_mobile_meram_runtime_suspend(struct device *dev)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(dev);
|
|
struct sh_mobile_meram_priv *priv = platform_get_drvdata(pdev);
|
|
int k, j;
|
|
|
|
for (k = 0; k < CMN_REGS_SIZE; k++)
|
|
priv->cmn_saved_regs[k] = meram_read_reg(priv->base,
|
|
common_regs[k]);
|
|
|
|
for (j = 0; j < 32; j++) {
|
|
if (!test_bit(j, &priv->used_icb))
|
|
continue;
|
|
for (k = 0; k < ICB_REGS_SIZE; k++) {
|
|
priv->icb_saved_regs[j * ICB_REGS_SIZE + k] =
|
|
meram_read_icb(priv->base, j, icb_regs[k]);
|
|
/* Reset ICB on resume */
|
|
if (icb_regs[k] == MExxCTL)
|
|
priv->icb_saved_regs[j * ICB_REGS_SIZE + k] |=
|
|
MExxCTL_WBF | MExxCTL_WF | MExxCTL_RF;
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int sh_mobile_meram_runtime_resume(struct device *dev)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(dev);
|
|
struct sh_mobile_meram_priv *priv = platform_get_drvdata(pdev);
|
|
int k, j;
|
|
|
|
for (j = 0; j < 32; j++) {
|
|
if (!test_bit(j, &priv->used_icb))
|
|
continue;
|
|
for (k = 0; k < ICB_REGS_SIZE; k++) {
|
|
meram_write_icb(priv->base, j, icb_regs[k],
|
|
priv->icb_saved_regs[j * ICB_REGS_SIZE + k]);
|
|
}
|
|
}
|
|
|
|
for (k = 0; k < CMN_REGS_SIZE; k++)
|
|
meram_write_reg(priv->base, common_regs[k],
|
|
priv->cmn_saved_regs[k]);
|
|
return 0;
|
|
}
|
|
|
|
static const struct dev_pm_ops sh_mobile_meram_dev_pm_ops = {
|
|
.runtime_suspend = sh_mobile_meram_runtime_suspend,
|
|
.runtime_resume = sh_mobile_meram_runtime_resume,
|
|
};
|
|
|
|
static struct sh_mobile_meram_ops sh_mobile_meram_ops = {
|
|
.module = THIS_MODULE,
|
|
.meram_register = sh_mobile_meram_register,
|
|
.meram_unregister = sh_mobile_meram_unregister,
|
|
.meram_update = sh_mobile_meram_update,
|
|
};
|
|
|
|
/*
|
|
* initialize MERAM
|
|
*/
|
|
|
|
static int sh_mobile_meram_remove(struct platform_device *pdev);
|
|
|
|
static int __devinit sh_mobile_meram_probe(struct platform_device *pdev)
|
|
{
|
|
struct sh_mobile_meram_priv *priv;
|
|
struct sh_mobile_meram_info *pdata = pdev->dev.platform_data;
|
|
struct resource *res;
|
|
int error;
|
|
|
|
if (!pdata) {
|
|
dev_err(&pdev->dev, "no platform data defined\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
if (!res) {
|
|
dev_err(&pdev->dev, "cannot get platform resources\n");
|
|
return -ENOENT;
|
|
}
|
|
|
|
priv = kzalloc(sizeof(*priv), GFP_KERNEL);
|
|
if (!priv) {
|
|
dev_err(&pdev->dev, "cannot allocate device data\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
platform_set_drvdata(pdev, priv);
|
|
|
|
/* initialize private data */
|
|
mutex_init(&priv->lock);
|
|
priv->base = ioremap_nocache(res->start, resource_size(res));
|
|
if (!priv->base) {
|
|
dev_err(&pdev->dev, "ioremap failed\n");
|
|
error = -EFAULT;
|
|
goto err;
|
|
}
|
|
pdata->ops = &sh_mobile_meram_ops;
|
|
pdata->priv = priv;
|
|
pdata->pdev = pdev;
|
|
|
|
/* initialize ICB addressing mode */
|
|
if (pdata->addr_mode == SH_MOBILE_MERAM_MODE1)
|
|
meram_write_reg(priv->base, MEVCR1, MEVCR1_AMD1);
|
|
|
|
pm_runtime_enable(&pdev->dev);
|
|
|
|
dev_info(&pdev->dev, "sh_mobile_meram initialized.");
|
|
|
|
return 0;
|
|
|
|
err:
|
|
sh_mobile_meram_remove(pdev);
|
|
|
|
return error;
|
|
}
|
|
|
|
|
|
static int sh_mobile_meram_remove(struct platform_device *pdev)
|
|
{
|
|
struct sh_mobile_meram_priv *priv = platform_get_drvdata(pdev);
|
|
|
|
pm_runtime_disable(&pdev->dev);
|
|
|
|
if (priv->base)
|
|
iounmap(priv->base);
|
|
|
|
mutex_destroy(&priv->lock);
|
|
|
|
kfree(priv);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver sh_mobile_meram_driver = {
|
|
.driver = {
|
|
.name = "sh_mobile_meram",
|
|
.owner = THIS_MODULE,
|
|
.pm = &sh_mobile_meram_dev_pm_ops,
|
|
},
|
|
.probe = sh_mobile_meram_probe,
|
|
.remove = sh_mobile_meram_remove,
|
|
};
|
|
|
|
module_platform_driver(sh_mobile_meram_driver);
|
|
|
|
MODULE_DESCRIPTION("SuperH Mobile MERAM driver");
|
|
MODULE_AUTHOR("Damian Hobson-Garcia / Takanari Hayama");
|
|
MODULE_LICENSE("GPL v2");
|