2b5987abaf
We reserve the 3.75GB - 4GB region of PCIe address space for device to device transfers, making the corresponding physical memory under direct mapping unavailable for DMA. To allow for PCIe DMA to all physical memory we map this chunk of physical memory with BAR1. Because of the resulting discontinuity in the mapping function, we remove a page of memory at each end of the range so multi-page DMA buffers can never be allocated that span the range. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1535/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
||
|---|---|---|
| .. | ||
| executive | ||
| cpu.c | ||
| csrc-octeon.c | ||
| dma-octeon.c | ||
| flash_setup.c | ||
| Kconfig | ||
| Makefile | ||
| octeon_boot.h | ||
| octeon-irq.c | ||
| octeon-memcpy.S | ||
| octeon-platform.c | ||
| Platform | ||
| serial.c | ||
| setup.c | ||
| smp.c | ||