Vineet Gupta a690984d60 ARC: [mm] refactor the core (i|d)cache line ops loops ... Nothing semantical * simplify the alignement code by using & operation only * rename variables clearly as paddr Signed-off-by: Vineet Gupta <vgupta@synopsys.com>		2013-05-09 14:18:50 +05:30
..
boot	ARC: Add support for nSIM OSCI System C model	2013-05-07 13:44:00 +05:30
configs	ARC: Add support for nSIM OSCI System C model	2013-05-07 13:44:00 +05:30
include	ARC: [mm] Lazy D-cache flush (non aliasing VIPT)	2013-05-07 19:08:15 +05:30
kernel	ARC: Prepare interrupt code for external controllers	2013-05-07 13:43:58 +05:30
lib	ARC: String library	2013-02-11 20:00:35 +05:30
mm	ARC: [mm] refactor the core (i|d)cache line ops loops	2013-05-09 14:18:50 +05:30
oprofile	ARC: OProfile support	2013-02-15 23:16:00 +05:30
plat-arcfpga	ARC: Add support for nSIM OSCI System C model	2013-05-07 13:44:00 +05:30
plat-tb10x	ARC: [TB10x] Add support for TB10x platform	2013-05-07 13:43:59 +05:30
Kbuild
Kconfig	ARC: [TB10x] Add support for TB10x platform	2013-05-07 13:43:59 +05:30
Kconfig.debug
Makefile	ARC: [TB10x] Add support for TB10x platform	2013-05-07 13:43:59 +05:30