183 lines
2.9 KiB
ArmAsm
183 lines
2.9 KiB
ArmAsm
/* ld script for sparc32/sparc64 kernel */
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#include <asm-generic/vmlinux.lds.h>
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#include <asm/page.h>
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#include <asm/thread_info.h>
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#ifdef CONFIG_SPARC32
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#define INITIAL_ADDRESS 0x10000 + SIZEOF_HEADERS
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#define TEXTSTART 0xf0004000
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#define SMP_CACHE_BYTES_SHIFT 5
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#else
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#define SMP_CACHE_BYTES_SHIFT 6
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#define INITIAL_ADDRESS 0x4000
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#define TEXTSTART 0x0000000000404000
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#endif
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#define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT)
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#ifdef CONFIG_SPARC32
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OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc")
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OUTPUT_ARCH(sparc)
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ENTRY(_start)
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jiffies = jiffies_64 + 4;
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#else
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/* sparc64 */
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OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc")
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OUTPUT_ARCH(sparc:v9a)
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ENTRY(_start)
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jiffies = jiffies_64;
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#endif
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SECTIONS
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{
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/* swapper_low_pmd_dir is sparc64 only */
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swapper_low_pmd_dir = 0x0000000000402000;
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. = INITIAL_ADDRESS;
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.text TEXTSTART :
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{
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_text = .;
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*(.text.head)
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TEXT_TEXT
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SCHED_TEXT
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LOCK_TEXT
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KPROBES_TEXT
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*(.gnu.warning)
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} = 0
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_etext = .;
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RO_DATA(PAGE_SIZE)
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.data : {
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DATA_DATA
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CONSTRUCTORS
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}
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.data1 : {
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*(.data1)
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}
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. = ALIGN(SMP_CACHE_BYTES);
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.data.cacheline_aligned : {
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*(.data.cacheline_aligned)
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}
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. = ALIGN(SMP_CACHE_BYTES);
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.data.read_mostly : {
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*(.data.read_mostly)
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}
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/* End of data section */
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_edata = .;
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/* init_task */
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. = ALIGN(THREAD_SIZE);
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.data.init_task : {
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*(.data.init_task)
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}
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.fixup : {
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__start___fixup = .;
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*(.fixup)
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__stop___fixup = .;
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}
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. = ALIGN(16);
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__ex_table : {
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__start___ex_table = .;
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*(__ex_table)
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__stop___ex_table = .;
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}
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NOTES
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. = ALIGN(PAGE_SIZE);
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.init.text : {
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__init_begin = .;
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_sinittext = .;
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INIT_TEXT
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_einittext = .;
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}
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__init_text_end = .;
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.init.data : {
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INIT_DATA
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}
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. = ALIGN(16);
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.init.setup : {
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__setup_start = .;
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*(.init.setup)
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__setup_end = .;
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}
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.initcall.init : {
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__initcall_start = .;
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INITCALLS
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__initcall_end = .;
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}
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.con_initcall.init : {
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__con_initcall_start = .;
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*(.con_initcall.init)
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__con_initcall_end = .;
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}
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SECURITY_INIT
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. = ALIGN(4);
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.tsb_ldquad_phys_patch : {
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__tsb_ldquad_phys_patch = .;
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*(.tsb_ldquad_phys_patch)
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__tsb_ldquad_phys_patch_end = .;
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}
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.tsb_phys_patch : {
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__tsb_phys_patch = .;
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*(.tsb_phys_patch)
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__tsb_phys_patch_end = .;
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}
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.cpuid_patch : {
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__cpuid_patch = .;
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*(.cpuid_patch)
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__cpuid_patch_end = .;
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}
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.sun4v_1insn_patch : {
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__sun4v_1insn_patch = .;
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*(.sun4v_1insn_patch)
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__sun4v_1insn_patch_end = .;
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}
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.sun4v_2insn_patch : {
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__sun4v_2insn_patch = .;
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*(.sun4v_2insn_patch)
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__sun4v_2insn_patch_end = .;
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}
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#ifdef CONFIG_BLK_DEV_INITRD
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. = ALIGN(PAGE_SIZE);
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.init.ramfs : {
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__initramfs_start = .;
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*(.init.ramfs)
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__initramfs_end = .;
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}
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#endif
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PERCPU(PAGE_SIZE)
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. = ALIGN(PAGE_SIZE);
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__init_end = .;
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__bss_start = .;
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.sbss : {
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*(.sbss)
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*(.scommon)
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}
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.bss : {
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*(.dynbss)
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*(.bss)
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*(COMMON)
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}
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_end = . ;
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/DISCARD/ : {
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EXIT_TEXT
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EXIT_DATA
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*(.exitcall.exit)
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}
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STABS_DEBUG
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DWARF_DEBUG
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}
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