linux/drivers/clk/socfpga
Thomas Gleixner 1ccea77e2a treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version this program is distributed in the
  hope that it will be useful but without any warranty without even
  the implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details you
  should have received a copy of the gnu general public license along
  with this program if not see http www gnu org licenses

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version this program is distributed in the
  hope that it will be useful but without any warranty without even
  the implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details [based]
  [from] [clk] [highbank] [c] you should have received a copy of the
  gnu general public license along with this program if not see http
  www gnu org licenses

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 355 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com>
Reviewed-by: Steve Winslow <swinslow@gmail.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190519154041.837383322@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21 11:28:45 +02:00
..
Makefile clk: socfpga: stratix10: add clock driver for Stratix10 platform 2018-04-06 10:12:35 -07:00
clk-gate-a10.c clk: socfpga: Fix the smplsel on Arria10 and Stratix10 2017-06-19 17:01:55 -07:00
clk-gate-s10.c clk: Remove io.h from clk-provider.h 2019-05-15 13:21:37 -07:00
clk-gate.c clk: socfpga: Don't have get_parent for single parent ops 2019-01-24 11:36:25 -08:00
clk-periph-a10.c clk: socfpga: allow for multiple parents on Arria10 periph clocks 2016-02-22 14:17:37 -08:00
clk-periph-s10.c clk: Remove io.h from clk-provider.h 2019-05-15 13:21:37 -07:00
clk-periph.c clk: socfpga: Add a second parent option for the dbg_base_clk 2015-08-24 16:49:03 -07:00
clk-pll-a10.c clk: socfpga: fix refcount leak 2018-12-28 11:29:06 -08:00
clk-pll-s10.c clk: Remove io.h from clk-provider.h 2019-05-15 13:21:37 -07:00
clk-pll.c clk: socfpga: fix refcount leak 2018-12-28 11:29:06 -08:00
clk-s10.c clk: socfpga: stratix10: fix naming convention for the fixed-clocks 2019-01-15 12:58:38 -08:00
clk.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13 2019-05-21 11:28:45 +02:00
clk.h clk: socfpga: stratix10: add clock driver for Stratix10 platform 2018-04-06 10:12:35 -07:00
stratix10-clk.h clk: socfpga: stratix10: add clock driver for Stratix10 platform 2018-04-06 10:12:35 -07:00