69d88a00a2
This patch adds common register access for 24xx and 34xx power and clock management in order to share code between 24xx and 34xx. Only change USB platform init code to use new register access, other access will be changed in later patches. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
754 lines
19 KiB
C
754 lines
19 KiB
C
/*
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* arch/arm/plat-omap/usb.c -- platform level USB initialization
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*
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* Copyright (C) 2004 Texas Instruments, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#undef DEBUG
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/usb/otg.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/system.h>
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#include <asm/hardware.h>
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#include <asm/arch/control.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/usb.h>
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#include <asm/arch/board.h>
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#ifdef CONFIG_ARCH_OMAP1
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#define INT_USB_IRQ_GEN IH2_BASE + 20
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#define INT_USB_IRQ_NISO IH2_BASE + 30
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#define INT_USB_IRQ_ISO IH2_BASE + 29
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#define INT_USB_IRQ_HGEN INT_USB_HHC_1
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#define INT_USB_IRQ_OTG IH2_BASE + 8
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#else
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#define INT_USB_IRQ_GEN INT_24XX_USB_IRQ_GEN
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#define INT_USB_IRQ_NISO INT_24XX_USB_IRQ_NISO
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#define INT_USB_IRQ_ISO INT_24XX_USB_IRQ_ISO
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#define INT_USB_IRQ_HGEN INT_24XX_USB_IRQ_HGEN
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#define INT_USB_IRQ_OTG INT_24XX_USB_IRQ_OTG
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#endif
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/* These routines should handle the standard chip-specific modes
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* for usb0/1/2 ports, covering basic mux and transceiver setup.
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*
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* Some board-*.c files will need to set up additional mux options,
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* like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
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*/
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/* TESTED ON:
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* - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
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* - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
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* - 5912 OSK UDC, with *nonstandard* A-to-A cable
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* - 1510 Innovator UDC with bundled usb0 cable
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* - 1510 Innovator OHCI with bundled usb1/usb2 cable
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* - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS
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* - 1710 custom development board using alternate pin group
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* - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables
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*/
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/*-------------------------------------------------------------------------*/
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#if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_USB_MUSB_OTG)
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static struct otg_transceiver *xceiv;
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/**
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* otg_get_transceiver - find the (single) OTG transceiver driver
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*
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* Returns the transceiver driver, after getting a refcount to it; or
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* null if there is no such transceiver. The caller is responsible for
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* releasing that count.
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*/
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struct otg_transceiver *otg_get_transceiver(void)
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{
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if (xceiv)
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get_device(xceiv->dev);
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return xceiv;
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}
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EXPORT_SYMBOL(otg_get_transceiver);
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int otg_set_transceiver(struct otg_transceiver *x)
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{
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if (xceiv && x)
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return -EBUSY;
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xceiv = x;
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return 0;
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}
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EXPORT_SYMBOL(otg_set_transceiver);
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#endif
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/*-------------------------------------------------------------------------*/
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#if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP15XX)
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static void omap2_usb_devconf_clear(u8 port, u32 mask)
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{
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u32 r;
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r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
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r &= ~USBTXWRMODEI(port, mask);
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omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
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}
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static void omap2_usb_devconf_set(u8 port, u32 mask)
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{
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u32 r;
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r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
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r |= USBTXWRMODEI(port, mask);
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omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
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}
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static void omap2_usb2_disable_5pinbitll(void)
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{
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u32 r;
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r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
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r &= ~(USBTXWRMODEI(2, USB_BIDIR_TLL) | USBT2TLL5PI);
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omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
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}
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static void omap2_usb2_enable_5pinunitll(void)
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{
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u32 r;
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r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
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r |= USBTXWRMODEI(2, USB_UNIDIR_TLL) | USBT2TLL5PI;
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omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
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}
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static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device)
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{
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u32 syscon1 = 0;
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if (cpu_is_omap24xx())
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omap2_usb_devconf_clear(0, USB_BIDIR_TLL);
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if (nwires == 0) {
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if (cpu_class_is_omap1() && !cpu_is_omap15xx()) {
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/* pulldown D+/D- */
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USB_TRANSCEIVER_CTRL_REG &= ~(3 << 1);
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}
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return 0;
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}
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if (is_device) {
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if (cpu_is_omap24xx())
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omap_cfg_reg(J20_24XX_USB0_PUEN);
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else
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omap_cfg_reg(W4_USB_PUEN);
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}
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/* internal transceiver (unavailable on 17xx, 24xx) */
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if (!cpu_class_is_omap2() && nwires == 2) {
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// omap_cfg_reg(P9_USB_DP);
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// omap_cfg_reg(R8_USB_DM);
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if (cpu_is_omap15xx()) {
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/* This works on 1510-Innovator */
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return 0;
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}
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/* NOTES:
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* - peripheral should configure VBUS detection!
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* - only peripherals may use the internal D+/D- pulldowns
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* - OTG support on this port not yet written
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*/
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USB_TRANSCEIVER_CTRL_REG &= ~(7 << 4);
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if (!is_device)
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USB_TRANSCEIVER_CTRL_REG |= (3 << 1);
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return 3 << 16;
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}
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/* alternate pin config, external transceiver */
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if (cpu_is_omap15xx()) {
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printk(KERN_ERR "no usb0 alt pin config on 15xx\n");
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return 0;
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}
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if (cpu_is_omap24xx()) {
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omap_cfg_reg(K18_24XX_USB0_DAT);
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omap_cfg_reg(K19_24XX_USB0_TXEN);
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omap_cfg_reg(J14_24XX_USB0_SE0);
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if (nwires != 3)
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omap_cfg_reg(J18_24XX_USB0_RCV);
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} else {
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omap_cfg_reg(V6_USB0_TXD);
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omap_cfg_reg(W9_USB0_TXEN);
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omap_cfg_reg(W5_USB0_SE0);
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if (nwires != 3)
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omap_cfg_reg(Y5_USB0_RCV);
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}
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/* NOTE: SPEED and SUSP aren't configured here. OTG hosts
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* may be able to use I2C requests to set those bits along
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* with VBUS switching and overcurrent detection.
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*/
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if (cpu_class_is_omap1() && nwires != 6)
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USB_TRANSCEIVER_CTRL_REG &= ~CONF_USB2_UNI_R;
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switch (nwires) {
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case 3:
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syscon1 = 2;
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if (cpu_is_omap24xx())
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omap2_usb_devconf_set(0, USB_BIDIR);
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break;
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case 4:
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syscon1 = 1;
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if (cpu_is_omap24xx())
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omap2_usb_devconf_set(0, USB_BIDIR);
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break;
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case 6:
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syscon1 = 3;
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if (cpu_is_omap24xx()) {
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omap_cfg_reg(J19_24XX_USB0_VP);
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omap_cfg_reg(K20_24XX_USB0_VM);
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omap2_usb_devconf_set(0, USB_UNIDIR);
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} else {
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omap_cfg_reg(AA9_USB0_VP);
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omap_cfg_reg(R9_USB0_VM);
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USB_TRANSCEIVER_CTRL_REG |= CONF_USB2_UNI_R;
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}
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break;
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default:
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printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
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0, nwires);
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}
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return syscon1 << 16;
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}
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static u32 __init omap_usb1_init(unsigned nwires)
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{
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u32 syscon1 = 0;
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if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6)
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USB_TRANSCEIVER_CTRL_REG &= ~CONF_USB1_UNI_R;
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if (cpu_is_omap24xx())
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omap2_usb_devconf_clear(1, USB_BIDIR_TLL);
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if (nwires == 0)
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return 0;
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/* external transceiver */
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if (cpu_class_is_omap1()) {
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omap_cfg_reg(USB1_TXD);
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omap_cfg_reg(USB1_TXEN);
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if (nwires != 3)
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omap_cfg_reg(USB1_RCV);
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}
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if (cpu_is_omap15xx()) {
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omap_cfg_reg(USB1_SEO);
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omap_cfg_reg(USB1_SPEED);
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// SUSP
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} else if (cpu_is_omap1610() || cpu_is_omap5912()) {
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omap_cfg_reg(W13_1610_USB1_SE0);
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omap_cfg_reg(R13_1610_USB1_SPEED);
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// SUSP
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} else if (cpu_is_omap1710()) {
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omap_cfg_reg(R13_1710_USB1_SE0);
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// SUSP
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} else if (cpu_is_omap24xx()) {
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/* NOTE: board-specific code must set up pin muxing for usb1,
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* since each signal could come out on either of two balls.
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*/
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} else {
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pr_debug("usb%d cpu unrecognized\n", 1);
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return 0;
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}
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switch (nwires) {
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case 2:
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if (!cpu_is_omap24xx())
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goto bad;
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/* NOTE: board-specific code must override this setting if
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* this TLL link is not using DP/DM
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*/
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syscon1 = 1;
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omap2_usb_devconf_set(1, USB_BIDIR_TLL);
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break;
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case 3:
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syscon1 = 2;
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if (cpu_is_omap24xx())
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omap2_usb_devconf_set(1, USB_BIDIR);
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break;
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case 4:
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syscon1 = 1;
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if (cpu_is_omap24xx())
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omap2_usb_devconf_set(1, USB_BIDIR);
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break;
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case 6:
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if (cpu_is_omap24xx())
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goto bad;
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syscon1 = 3;
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omap_cfg_reg(USB1_VP);
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omap_cfg_reg(USB1_VM);
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if (!cpu_is_omap15xx())
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USB_TRANSCEIVER_CTRL_REG |= CONF_USB1_UNI_R;
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break;
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default:
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bad:
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printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
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1, nwires);
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}
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return syscon1 << 20;
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}
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static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup)
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{
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u32 syscon1 = 0;
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if (cpu_is_omap24xx()) {
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omap2_usb2_disable_5pinbitll();
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alt_pingroup = 0;
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}
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/* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
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if (alt_pingroup || nwires == 0)
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return 0;
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if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6)
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USB_TRANSCEIVER_CTRL_REG &= ~CONF_USB2_UNI_R;
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/* external transceiver */
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if (cpu_is_omap15xx()) {
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omap_cfg_reg(USB2_TXD);
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omap_cfg_reg(USB2_TXEN);
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omap_cfg_reg(USB2_SEO);
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if (nwires != 3)
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omap_cfg_reg(USB2_RCV);
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/* there is no USB2_SPEED */
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} else if (cpu_is_omap16xx()) {
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omap_cfg_reg(V6_USB2_TXD);
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omap_cfg_reg(W9_USB2_TXEN);
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omap_cfg_reg(W5_USB2_SE0);
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if (nwires != 3)
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omap_cfg_reg(Y5_USB2_RCV);
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// FIXME omap_cfg_reg(USB2_SPEED);
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} else if (cpu_is_omap24xx()) {
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omap_cfg_reg(Y11_24XX_USB2_DAT);
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omap_cfg_reg(AA10_24XX_USB2_SE0);
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if (nwires > 2)
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omap_cfg_reg(AA12_24XX_USB2_TXEN);
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if (nwires > 3)
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omap_cfg_reg(AA6_24XX_USB2_RCV);
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} else {
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pr_debug("usb%d cpu unrecognized\n", 1);
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return 0;
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}
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// if (cpu_class_is_omap1()) omap_cfg_reg(USB2_SUSP);
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switch (nwires) {
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case 2:
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if (!cpu_is_omap24xx())
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goto bad;
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/* NOTE: board-specific code must override this setting if
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* this TLL link is not using DP/DM
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*/
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syscon1 = 1;
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omap2_usb_devconf_set(2, USB_BIDIR_TLL);
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break;
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case 3:
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syscon1 = 2;
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if (cpu_is_omap24xx())
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omap2_usb_devconf_set(2, USB_BIDIR);
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break;
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case 4:
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syscon1 = 1;
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if (cpu_is_omap24xx())
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omap2_usb_devconf_set(2, USB_BIDIR);
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break;
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case 5:
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if (!cpu_is_omap24xx())
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goto bad;
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omap_cfg_reg(AA4_24XX_USB2_TLLSE0);
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/* NOTE: board-specific code must override this setting if
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* this TLL link is not using DP/DM. Something must also
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* set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED}
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*/
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syscon1 = 3;
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omap2_usb2_enable_5pinunitll();
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break;
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case 6:
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if (cpu_is_omap24xx())
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goto bad;
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syscon1 = 3;
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if (cpu_is_omap15xx()) {
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omap_cfg_reg(USB2_VP);
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omap_cfg_reg(USB2_VM);
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} else {
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omap_cfg_reg(AA9_USB2_VP);
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omap_cfg_reg(R9_USB2_VM);
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USB_TRANSCEIVER_CTRL_REG |= CONF_USB2_UNI_R;
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}
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break;
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default:
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bad:
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printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
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2, nwires);
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}
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return syscon1 << 24;
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}
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#endif
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/*-------------------------------------------------------------------------*/
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#if defined(CONFIG_USB_GADGET_OMAP) || \
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defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) || \
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(defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG))
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static void usb_release(struct device *dev)
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{
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/* normally not freed */
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}
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#endif
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#ifdef CONFIG_USB_GADGET_OMAP
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static struct resource udc_resources[] = {
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/* order is significant! */
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{ /* registers */
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.start = UDC_BASE,
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.end = UDC_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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}, { /* general IRQ */
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.start = INT_USB_IRQ_GEN,
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.flags = IORESOURCE_IRQ,
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}, { /* PIO IRQ */
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.start = INT_USB_IRQ_NISO,
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.flags = IORESOURCE_IRQ,
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}, { /* SOF IRQ */
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.start = INT_USB_IRQ_ISO,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 udc_dmamask = ~(u32)0;
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static struct platform_device udc_device = {
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.name = "omap_udc",
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.id = -1,
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.dev = {
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.release = usb_release,
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.dma_mask = &udc_dmamask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(udc_resources),
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.resource = udc_resources,
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};
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#endif
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#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
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/* The dmamask must be set for OHCI to work */
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static u64 ohci_dmamask = ~(u32)0;
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static struct resource ohci_resources[] = {
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{
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.start = OMAP_OHCI_BASE,
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.end = OMAP_OHCI_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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},
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|
{
|
|
.start = INT_USB_IRQ_HGEN,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
static struct platform_device ohci_device = {
|
|
.name = "ohci",
|
|
.id = -1,
|
|
.dev = {
|
|
.release = usb_release,
|
|
.dma_mask = &ohci_dmamask,
|
|
.coherent_dma_mask = 0xffffffff,
|
|
},
|
|
.num_resources = ARRAY_SIZE(ohci_resources),
|
|
.resource = ohci_resources,
|
|
};
|
|
|
|
#endif
|
|
|
|
#if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
|
|
|
|
static struct resource otg_resources[] = {
|
|
/* order is significant! */
|
|
{
|
|
.start = OTG_BASE,
|
|
.end = OTG_BASE + 0xff,
|
|
.flags = IORESOURCE_MEM,
|
|
}, {
|
|
.start = INT_USB_IRQ_OTG,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
static struct platform_device otg_device = {
|
|
.name = "omap_otg",
|
|
.id = -1,
|
|
.dev = {
|
|
.release = usb_release,
|
|
},
|
|
.num_resources = ARRAY_SIZE(otg_resources),
|
|
.resource = otg_resources,
|
|
};
|
|
|
|
#endif
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
#define ULPD_CLOCK_CTRL_REG __REG16(ULPD_CLOCK_CTRL)
|
|
#define ULPD_SOFT_REQ_REG __REG16(ULPD_SOFT_REQ)
|
|
|
|
|
|
// FIXME correct answer depends on hmc_mode,
|
|
// as does (on omap1) any nonzero value for config->otg port number
|
|
#ifdef CONFIG_USB_GADGET_OMAP
|
|
#define is_usb0_device(config) 1
|
|
#else
|
|
#define is_usb0_device(config) 0
|
|
#endif
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
#ifdef CONFIG_ARCH_OMAP_OTG
|
|
|
|
void __init
|
|
omap_otg_init(struct omap_usb_config *config)
|
|
{
|
|
u32 syscon = OTG_SYSCON_1_REG & 0xffff;
|
|
int status;
|
|
int alt_pingroup = 0;
|
|
|
|
/* NOTE: no bus or clock setup (yet?) */
|
|
|
|
syscon = OTG_SYSCON_1_REG & 0xffff;
|
|
if (!(syscon & OTG_RESET_DONE))
|
|
pr_debug("USB resets not complete?\n");
|
|
|
|
// OTG_IRQ_EN_REG = 0;
|
|
|
|
/* pin muxing and transceiver pinouts */
|
|
if (config->pins[0] > 2) /* alt pingroup 2 */
|
|
alt_pingroup = 1;
|
|
syscon |= omap_usb0_init(config->pins[0], is_usb0_device(config));
|
|
syscon |= omap_usb1_init(config->pins[1]);
|
|
syscon |= omap_usb2_init(config->pins[2], alt_pingroup);
|
|
pr_debug("OTG_SYSCON_1_REG = %08x\n", syscon);
|
|
OTG_SYSCON_1_REG = syscon;
|
|
|
|
syscon = config->hmc_mode;
|
|
syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */;
|
|
#ifdef CONFIG_USB_OTG
|
|
if (config->otg)
|
|
syscon |= OTG_EN;
|
|
#endif
|
|
if (cpu_class_is_omap1())
|
|
pr_debug("USB_TRANSCEIVER_CTRL_REG = %03x\n", USB_TRANSCEIVER_CTRL_REG);
|
|
pr_debug("OTG_SYSCON_2_REG = %08x\n", syscon);
|
|
OTG_SYSCON_2_REG = syscon;
|
|
|
|
printk("USB: hmc %d", config->hmc_mode);
|
|
if (!alt_pingroup)
|
|
printk(", usb2 alt %d wires", config->pins[2]);
|
|
else if (config->pins[0])
|
|
printk(", usb0 %d wires%s", config->pins[0],
|
|
is_usb0_device(config) ? " (dev)" : "");
|
|
if (config->pins[1])
|
|
printk(", usb1 %d wires", config->pins[1]);
|
|
if (!alt_pingroup && config->pins[2])
|
|
printk(", usb2 %d wires", config->pins[2]);
|
|
if (config->otg)
|
|
printk(", Mini-AB on usb%d", config->otg - 1);
|
|
printk("\n");
|
|
|
|
if (cpu_class_is_omap1()) {
|
|
/* leave USB clocks/controllers off until needed */
|
|
ULPD_SOFT_REQ_REG &= ~SOFT_USB_CLK_REQ;
|
|
ULPD_CLOCK_CTRL_REG &= ~USB_MCLK_EN;
|
|
ULPD_CLOCK_CTRL_REG |= DIS_USB_PVCI_CLK;
|
|
}
|
|
syscon = OTG_SYSCON_1_REG;
|
|
syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN;
|
|
|
|
#ifdef CONFIG_USB_GADGET_OMAP
|
|
if (config->otg || config->register_dev) {
|
|
syscon &= ~DEV_IDLE_EN;
|
|
udc_device.dev.platform_data = config;
|
|
/* FIXME patch IRQ numbers for omap730 */
|
|
status = platform_device_register(&udc_device);
|
|
if (status)
|
|
pr_debug("can't register UDC device, %d\n", status);
|
|
}
|
|
#endif
|
|
|
|
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
|
|
if (config->otg || config->register_host) {
|
|
syscon &= ~HST_IDLE_EN;
|
|
ohci_device.dev.platform_data = config;
|
|
if (cpu_is_omap730())
|
|
ohci_resources[1].start = INT_730_USB_HHC_1;
|
|
status = platform_device_register(&ohci_device);
|
|
if (status)
|
|
pr_debug("can't register OHCI device, %d\n", status);
|
|
}
|
|
#endif
|
|
|
|
#ifdef CONFIG_USB_OTG
|
|
if (config->otg) {
|
|
syscon &= ~OTG_IDLE_EN;
|
|
otg_device.dev.platform_data = config;
|
|
if (cpu_is_omap730())
|
|
otg_resources[1].start = INT_730_USB_OTG;
|
|
status = platform_device_register(&otg_device);
|
|
if (status)
|
|
pr_debug("can't register OTG device, %d\n", status);
|
|
}
|
|
#endif
|
|
pr_debug("OTG_SYSCON_1_REG = %08x\n", syscon);
|
|
OTG_SYSCON_1_REG = syscon;
|
|
|
|
status = 0;
|
|
}
|
|
|
|
#else
|
|
static inline void omap_otg_init(struct omap_usb_config *config) {}
|
|
#endif
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
#ifdef CONFIG_ARCH_OMAP15XX
|
|
|
|
#define ULPD_DPLL_CTRL_REG __REG16(ULPD_DPLL_CTRL)
|
|
#define DPLL_IOB (1 << 13)
|
|
#define DPLL_PLL_ENABLE (1 << 4)
|
|
#define DPLL_LOCK (1 << 0)
|
|
|
|
#define ULPD_APLL_CTRL_REG __REG16(ULPD_APLL_CTRL)
|
|
#define APLL_NDPLL_SWITCH (1 << 0)
|
|
|
|
|
|
static void __init omap_1510_usb_init(struct omap_usb_config *config)
|
|
{
|
|
unsigned int val;
|
|
|
|
omap_usb0_init(config->pins[0], is_usb0_device(config));
|
|
omap_usb1_init(config->pins[1]);
|
|
omap_usb2_init(config->pins[2], 0);
|
|
|
|
val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1);
|
|
val |= (config->hmc_mode << 1);
|
|
omap_writel(val, MOD_CONF_CTRL_0);
|
|
|
|
printk("USB: hmc %d", config->hmc_mode);
|
|
if (config->pins[0])
|
|
printk(", usb0 %d wires%s", config->pins[0],
|
|
is_usb0_device(config) ? " (dev)" : "");
|
|
if (config->pins[1])
|
|
printk(", usb1 %d wires", config->pins[1]);
|
|
if (config->pins[2])
|
|
printk(", usb2 %d wires", config->pins[2]);
|
|
printk("\n");
|
|
|
|
/* use DPLL for 48 MHz function clock */
|
|
pr_debug("APLL %04x DPLL %04x REQ %04x\n", ULPD_APLL_CTRL_REG,
|
|
ULPD_DPLL_CTRL_REG, ULPD_SOFT_REQ_REG);
|
|
ULPD_APLL_CTRL_REG &= ~APLL_NDPLL_SWITCH;
|
|
ULPD_DPLL_CTRL_REG |= DPLL_IOB | DPLL_PLL_ENABLE;
|
|
ULPD_SOFT_REQ_REG |= SOFT_UDC_REQ | SOFT_DPLL_REQ;
|
|
while (!(ULPD_DPLL_CTRL_REG & DPLL_LOCK))
|
|
cpu_relax();
|
|
|
|
#ifdef CONFIG_USB_GADGET_OMAP
|
|
if (config->register_dev) {
|
|
int status;
|
|
|
|
udc_device.dev.platform_data = config;
|
|
status = platform_device_register(&udc_device);
|
|
if (status)
|
|
pr_debug("can't register UDC device, %d\n", status);
|
|
/* udc driver gates 48MHz by D+ pullup */
|
|
}
|
|
#endif
|
|
|
|
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
|
|
if (config->register_host) {
|
|
int status;
|
|
|
|
ohci_device.dev.platform_data = config;
|
|
status = platform_device_register(&ohci_device);
|
|
if (status)
|
|
pr_debug("can't register OHCI device, %d\n", status);
|
|
/* hcd explicitly gates 48MHz */
|
|
}
|
|
#endif
|
|
}
|
|
|
|
#else
|
|
static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
|
|
#endif
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
static struct omap_usb_config platform_data;
|
|
|
|
static int __init
|
|
omap_usb_init(void)
|
|
{
|
|
const struct omap_usb_config *config;
|
|
|
|
config = omap_get_config(OMAP_TAG_USB, struct omap_usb_config);
|
|
if (config == NULL) {
|
|
printk(KERN_ERR "USB: No board-specific "
|
|
"platform config found\n");
|
|
return -ENODEV;
|
|
}
|
|
platform_data = *config;
|
|
|
|
if (cpu_is_omap730() || cpu_is_omap16xx() || cpu_is_omap24xx())
|
|
omap_otg_init(&platform_data);
|
|
else if (cpu_is_omap15xx())
|
|
omap_1510_usb_init(&platform_data);
|
|
else {
|
|
printk(KERN_ERR "USB: No init for your chip yet\n");
|
|
return -ENODEV;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
subsys_initcall(omap_usb_init);
|